Part Number: TPS65981
one of my AA is facing issues with the TPS65981ABIRTQR.
The device has been configured through the Configuration Tool, mode DFP_D with +5V at PDO.
The CC pin seems working fine, but the data on the PD bus are not correct.
I've attached the project done with the configurator.
Can you please provide me with any hints ?
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In reply to Eric Beljaars:
below the ansers to your questions:
1. Just 1x PDO source capabilities is enables at 5V , the other sink are disabled.
2. PD is in APP mode after boot.
In the attachment the registers with the devide in debug mode.
It seems that there aren't any active contract PDO.
Device 1, port 0 Debug Registers.txt
Device 1, port 0 Configuration Registers.txt
In reply to domenyko:
On the other end of the cable there is HDMI/DP monitor of HP.
The CC lanes are detected in the right way, see registed 0x69, C_CC1 is used for PD protocol and C_CC2 for PP_CABLE:
Type C State Register (0x69) Type C State Register CC Pin For PD C_CC1 is CC pin CC1 Pin State Rd detected (Source only) CC2 Pin State Ra detected (Source only) Type C Port State Reserved
The test with EVM were fine. When the cable is connected, the peripheral is recognized and the PD procedure contract works. In the board of the cusotmer only the CC orientation is detected.
I've attached the dump of the registers of both EVM and customer's board.
Do you have any hint ?
correct the configuration setting are identical. We have collected some screenshot of the CC1, CC2 and Vbus signals.
The signals of the customer's board seem to be smoother that the signal of the EVM.
it seems that the device does not have enough strength to drive the lines.
Have you never seen something similar (I've attached the screenshots).
I was thinking if wrong capacitors (mounted by mistake) could give these effects.
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