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SN65HVD888: spice model of SN65HVD888

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Replies: 7

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Part Number: SN65HVD888

Hi engineers.

I'm looking for spice model of SN65HVD888.

I could find the model in 

http://www.ti.com/design-resources/design-tools-simulation/models-simulators/spice-library.html

So Pls send me the spice model.

BR.

  • Hi TI engineers.

    one correction of my question.

    I could NOT find the model in 

    http://www.ti.com/design-resources/design-tools-simulation/models-simulators/spice-library.html

    BR 

  • In reply to yosugi5:

    Hello,

    Unfortunately we only have an IBIS model available for this device.  It is available here:

    This type of model is more common for our interface transceiver products since it allows for accurate signal integrity simulations without requiring long calculation times.  Would you be able to use this IBIS model instead?

    Regards,
    Max Robertson

  • In reply to Max Robertson:

    Hi Max.

    Thank you for your reply and I'm sorry to be lare.

    I will check our circuit simulator if this IBIS model can be imported or not.

    Please wait for few days.

    Best Regards.

  • In reply to yosugi5:

    Hi Max,

    I imported IBIS model into our circuit simulator as following pin settings.

    Pin names

    IBIS - RealSN888(Pin#)

    PU  - Vcc(8)

    PD  - GND(5)

    T   - D(4)

    E  - DE((3)

    IO_N - A(6)

    IO_I  - B(7)

    DigO  - R(1)

    PC   -  +5VonSchem

    GC  -  GNDonSchem

    SN889's REZ(1) is not found in IBIS.

    Transient result is that DigO "H" was rinsing up to +1.0V not up to +5V. Could you tell me how to correct ?

    Best Regards.

  • In reply to yosugi5:

    Hello,

    The "DigO" port of an IBIS model is intended to give the digital logic output state of that model during the simulation - 1 V for high and 0 V for low.  If you are trying to model the characteristics of the R pin, you would need to use a tri-state output buffer component and associate it with the R pin of the SN65HVD888 IBIS model.  Once you do this you should see the full 5-V signal swing.

    (Note something that is confusing to many users accustomed to SPICE is that IBIS does not model the full functionality of the chip.  Instead, each IO is modeled individually.  So, you could simulate the RS-485 signal lines to see if they give a proper waveform in your application and you could simulate the "R" output and its connection to a UART/MCU, but the IBIS model itself wouldn't drive the "R" output based on the state of the "A"/"B" pins.)

    Regards,
    Max

  • In reply to Max Robertson:

    Hello Max

    I'm sorry to be late for reply.

    I converted -1 and 0V of "DigO" of SN65HVD888 to full 5-V signal swing. It's OK.

    BR

  • In reply to yosugi5:

    I'm happy to hear you've found a solution.  Thank you for the update.

    Regards,
    Max