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TLK110 MDIO communication trouble

Stefano Bisi
Intellectual 460 points
Other Parts Discussed in Thread: TLK110

Hello all,

we are  working on a board equipped with AM335x Micorcontroller and two tlk110 phy.

we have some trouble to talk with phys on MDIO channel. In our setup we want to use software strapping mode to configure Phys. Address are 00000 and 00001.

We found that phy at address 00001 never reply. We check this with oscilloscope on wire.

We found similar topic here:

http://e2e.ti.com/support/interface/industrial_interface/f/142/p/214049/756015.aspx

But we can't understand what is the solution.

somebody can send us more detail about "long 3.3V rise" issue ?

Thank in advance

Stefano & Co.

  • 0
    TI__Mastermind 31600 points

    Stefano,

    I have moved your post to the Ethernet forum so that it gets visibility by the right experts.  I will also move the post on the similar topic so that all the relevant posts are in the correct forum.

    Patrick

  • 0 in reply to Patrick OFarrell
    TI__Mastermind 31600 points

    Stefano,

    I have a few additional questions to help us better understand this functionality.

    Is this board a board of your design and construction or is this a standard TI EVM? 

    When you say that the PHY at address 0x01 never replies, do you mean that it does not respond to attempted MDIO accesses at PHY address 0x01?  When you check this with the oscilloscope, do you see the proper MDIO/MDC format as shown in the datasheet, but do not see any response from the PHY (i.e. you see all 1's returned during the Register Data portion of the Read Operation)?

    Patrick

  • 0 in reply to Patrick OFarrell
    Intellectual 460 points

    Patrick,


    Yes, we designed a board very similar to TI ICE EVM board.

    Yes, we checked bit by bit the MDIO line. We found that CPSW made a poll on MDIO line reading at all address from 0 to 31 . Each read accesses is similar to that shown  on Figure 4.3 of TLK110 datasheet.

    We can identify the read operation at PHY 0 ( address 0x00 ) and the reply of phy.

    The subsequent request to PHY 1 ( address 0x01 ) has no reply; it seems that line stay in Z during register data portion of the read operation.

    We configure phy addresses putting a pull down on pin 42 of phy 0 and leaving float the same pin of PHY 1 as described on datasheet.

    MDIO_CLK is about 1.5 MHz.

    Best regards

    Stefano

  • 0 in reply to Stefano Bisi
    TI__Intellectual 1500 points

    Hi Stefano,

    Is it possible you send the schematic of your board?
    You can send it by mail <email address removed>

    Thanks,
    Noam