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DS92LV18 is losing synchronization with the noise and ESD

Yury Milgram
Prodigy 100 points
Other Parts Discussed in Thread: LVDS-18B-EVK, DS92LV18

I am using DS92LV18 for IO expansion. The expansion board has five micro stepper motor drivers, one dc motor driver,  ensoders, SPI ADC  and some IO. All those signal goes thru Serializer / Deserializer. Power and communication to main board with the second DS92LV18 goes thru USB 3.0 connector.  I have't released my main board and testing my IO expansion board using TI LVDS-18B-EVK evaluation board.  

I  am testing the board and founded out that when motor start working synchronization could be lost mostly on the main board but some time on both. Also synchronization could be lost on any side after ESD event. After sending pulse on SYNC line the communication is recovering.

My expansion board is packed and small. I tried to keep DS92LV18  away from motor controllers. See attached schematic for  Serializer / Deserializer and power.

What changes would you recommend that can make  Serializer / Deserializer tolerate the noise and noise. 

Thank you,

Yury

2350.POWER_m .PDF5224.SER_DESSERIALIZER_m.PDF

  • 0
    TI__Expert 3175 points

    Hi Yury,

    We are looking into this cse, someone will send out a response soon.

    Regards,

    TK Chin

  • 0 in reply to T.K. Chin
    TI__Expert 3175 points

    Hi Yury,

    I suggest to use an oscilloscope with a high impedance probe, try to measure the interference or noise at RIN+-, and 3.3V. You need to find out if the interference from the motor is affecting the power supply, or directly affect the differential inputs (RIN+-) or output (DO+-).

    Once you have this information, the next step is introduce filtering to reduce the amount of interference. For power supply filtering, a common approach is to use a ferrite bead, and proper size of bypass capacitor (depend on the interference frequency). For RIN+-, a common filter technique is the use of a common mode choke in series, placed close to the RIN pins.Common mode choke is used to reject (reduce) the interference signal that appeared as common mode signal without impacting the differential signals (except with slight additional insertion loss caused by the added component).

    regards,

    TK Chin

     

  • 0
    TI__Mastermind 43795 points

    Also check for supply noise on the +12V and +3.3V nodes with an oscilloscope.  The switching supply could be allowing some of the motor control noise onto the +3.3V side. 

    Could also be a GND shift between the two boards when there is a heavy current load as power is supplied via the USB cable.  The LVDS connection is DC coupled.

    Regards,

    Lee

  • 0 in reply to T.K. Chin
    Prodigy 100 points

    Hi TK Chin,

    I added additional 10uf tantalum cap on 3.3V last week. I am running motors over 3 days and it haven’t lost synchronization yet.

    Did you have chance to look at attached schematic? Do you have any comment or recomendation?

    The master board sending motor steps and receiving encoders pulses to/from the motor board thru DS92LV. I am planning to monitor LOCK lines from both DS92LV on the master board, The master side  LOCK DS92LV will go directly to FPGA and the motor board LOCK signal DS92LV will go thru one of the IO. The SYNC line for both DS92LV will be control by FPGA, one directly and the other thru IO. I would like to have reset "lost of synchronization" circuitry in case the synchronization momentary lost due to the noise . The LOCK line from one of the DS92LV will trigger SYNC line from the second DS92LV. FPGA will monitor LOCK lines and in case is off more than time ~ 100us the operation will be stop in error.  Any comments to this approach?

    Thanks a lot,

    Yury

  • 0 in reply to Yury Milgram
    TI__Expert 3175 points

    Hi Yury,

    I did not see anything that catch my eyes.

    I do notice J6, app.eared to be an ESD protection device, VBUS=12V. I think you may want to use a lower supply voltage, so the transcient is clamped to lower voltage.

    I also noted that the supply pins are all tied to 3.3V. A ferrite bead in series with a 10uF at PVDD or AVDD will help to suppress motor noise affecting the PLL VDD and Analog VDD.

    The LOCK pin is not a sure indication of the de-serializer. It indicates if it is lock or lose lock. I think the best approach is to understand the magnitude of the motor noise, and find a suitable way to suppress the noise.

    Regards,

    TK Chin