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DP159RSBEVM: When DP159 is used in x-mode mode, the output clock frequency is not correct and unlocked after TP1

doph hai
Prodigy 190 points
Part Number: DP159RSBEVM

hi，

DP159 + XILINX DP IP

steps:

1.Initialize DP159 

2.Initialize DP IP

3.TP1 Interrupt Handler 

4.read_csr (0x00)    is 0x63 or 0xe3，pll unlocked ，DP IP always send the TP1 Interrupt。Measure the frequency of the AUX_SRCp/n pin with an oscilloscope，Frequencies sometimes in the 300MHZ, sometimes about  50MHZ .

Where is my problem？I do not know what the DP159 is working on，What sould I do next? 

The following is my initialization Dp159 register configuration

thanks ！！！

//dp159 config
//initial
./i2capp /dev/i2c-0 w 0x5e 0xFF 0x00
./i2capp /dev/i2c-0 w 0x5e 0x09 0x36
./i2capp /dev/i2c-0 w 0x5e 0x0A 0x7B
./i2capp /dev/i2c-0 w 0x5e 0x0D 0x80
./i2capp /dev/i2c-0 w 0x5e 0x0C 0x6D
./i2capp /dev/i2c-0 w 0x5e 0x10 0x00
./i2capp /dev/i2c-0 w 0x5e 0x16 0xF1



./i2capp /dev/i2c-0 w 0x5e 0xFF 0x01
./i2capp /dev/i2c-0 w 0x5e 0x00 0x02
./i2capp /dev/i2c-0 w 0x5e 0x04 0x80
./i2capp /dev/i2c-0 w 0x5e 0x05 0x00
./i2capp /dev/i2c-0 w 0x5e 0x08 0x00
./i2capp /dev/i2c-0 w 0x5e 0x0D 0x02
./i2capp /dev/i2c-0 w 0x5e 0x0E 0x03 //readback 0x01
./i2capp /dev/i2c-0 w 0x5e 0x01 0x01
./i2capp /dev/i2c-0 w 0x5e 0x02 0x3F // CP_CURRENT
./i2capp /dev/i2c-0 w 0x5e 0x0B 0x33
./i2capp /dev/i2c-0 w 0x5e 0xA1 0x02
./i2capp /dev/i2c-0 w 0x5e 0xA4 0x02


./i2capp /dev/i2c-0 w 0x5e 0x10 0xF0
./i2capp /dev/i2c-0 w 0x5e 0x11 0x30
./i2capp /dev/i2c-0 w 0x5e 0x14 0x00
./i2capp /dev/i2c-0 w 0x5e 0x12 0x03
./i2capp /dev/i2c-0 w 0x5e 0x13 0xFF
./i2capp /dev/i2c-0 w 0x5e 0x13 0x00



./i2capp /dev/i2c-0 w 0x5e 0x30 0xE0 //Disable Receivers except lane 0
./i2capp /dev/i2c-0 w 0x5e 0x32 0x00
./i2capp /dev/i2c-0 w 0x5e 0x31 0x00
./i2capp /dev/i2c-0 w 0x5e 0x4D 0x08
./i2capp /dev/i2c-0 w 0x5e 0x4C 0x01 //readback 0x3
./i2capp /dev/i2c-0 w 0x5e 0x34 0x01
./i2capp /dev/i2c-0 w 0x5e 0x32 0xF0
./i2capp /dev/i2c-0 w 0x5e 0x32 0x00
./i2capp /dev/i2c-0 w 0x5e 0x33 0xF0
./i2capp /dev/i2c-0 w 0x5e 0xFF 0x00
./i2capp /dev/i2c-0 w 0x5e 0x0A 0x3B
./i2capp /dev/i2c-0 w 0x5e 0xFF 0x01



// TP1 Interrupt Handler

./i2capp /dev/i2c-0 w 0x5e 0x00 0x02
./i2capp /dev/i2c-0 w 0x5e 0x01 0x01
./i2capp /dev/i2c-0 w 0x5e 0x0B 0x33
./i2capp /dev/i2c-0 w 0x5e 0x02 0x3F
./i2capp /dev/i2c-0 w 0x5e 0x30 0x0F //1lane 0xE1; 2LANE = 0xC3 ;4lane = 0X0F
./i2capp /dev/i2c-0 w 0x5e 0x00 0x03
./i2capp /dev/i2c-0 w 0x5e 0x4C 0x01
./i2capp /dev/i2c-0 w 0x5e 0x4D 0x18 // hbr= 0x18 hbr2 = 0x08 rbr= 0x28


./i2capp /dev/i2c-0 w 0x5e 0x10 0x0F //1lane 0xE1; 2LANE = 0xC3 ;4lane = 0X0F
./i2capp /dev/i2c-0 w 0x5e 0x00 0x23

./i2capp /dev/i2c-0 r 0x5e 0x00 //read the clock recovery

./i2capp /dev/i2c-0 w 0x5e 0x02 0x27 //hbr= 0x27 hbr2=0x5F rbr 0x1f
./i2capp /dev/i2c-0 w 0x5e 0x0B 0x30
./i2capp /dev/i2c-0 w 0x5e 0x01 0x02



./i2capp /dev/i2c-0 w 0x5e 0xFF 0x00
./i2capp /dev/i2c-0 w 0x5e 0x16 0xF1 // 1lane=0x11 ; 2lane= 0x31; 4lane=0xf1
./i2capp /dev/i2c-0 w 0x5e 0x10 0x00
./i2capp /dev/i2c-0 w 0x5e 0xFF 0x01



//TP2 Interrupt Handler
./i2capp /dev/i2c-0 w 0x5e 0x4C 0x03
./i2capp /dev/i2c-0 w 0x5e 0xFF 0x00
./i2capp /dev/i2c-0 w 0x5e 0x15 0x18
./i2capp /dev/i2c-0 r 0x5e 0x18 //Read core BERT counter [7:0]
./i2capp /dev/i2c-0 r 0x5e 0x19
./i2capp /dev/i2c-0 w 0x5e 0xFF 0x01

//unplug
./i2capp /dev/i2c-0 w 0x5e 0x00 0x02
./i2capp /dev/i2c-0 w 0x5e 0x34 0x01
./i2capp /dev/i2c-0 w 0x5e 0x02 0x3F
./i2capp /dev/i2c-0 w 0x5e 0x01 0x01
./i2capp /dev/i2c-0 w 0x5e 0x0B 0x33
./i2capp /dev/i2c-0 w 0x5e 0x4D 0x08
./i2capp /dev/i2c-0 w 0x5e 0x4C 0x01
./i2capp /dev/i2c-0 w 0x5e 0x33 0xF0
./i2capp /dev/i2c-0 w 0x5e 0x10 0xF0
./i2capp /dev/i2c-0 w 0x5e 0x30 0xE0

  • 0
    TI__Expert 7395 points
    Hello Doph,

    Your question is being assigned to the appropriate applications engineer.
    We will be providing some feedback soon

    Regards,
    Jorge
  • 0 in reply to Jorge Llamas (SWAT)
    Prodigy 190 points
    hi， Jorge Llamas
    Is there any problem with my configuration?

    thanks
  • 0 in reply to doph hai
    TI__Guru 60865 points
    Hello Doph,

    What is the application? How are the DP159 AUX pins connected? Are there 3.3V and AC terminations on the DP159 data lines? The thread is referencing the DP159RSBEVM which won't work for a x-mode application. Are you seeing the PLL Lock ever? What frequency is being received?

    Regards,
    JMMN
  • 0 in reply to JMMN
    Prodigy 190 points
    hi,JMMN

    I am using the Xilinx Display port(RX) IP v7.0 in my design with Zynq SOC。DP159 as the retimer

    1、In the initialization step，
    Write Address=0xE, Write Data=0x3
    Read Address=0xE, Read Data=0x1， The value read is not the same as the value written，Is this correct？

    2、While the DP159 is receiving the TPS1 pattern，the DP159’s PLL LOCK_COMPLETE status is 0 ，pll unlocked. AUX_SRCP has a frequency output but is not correct and always change frequency.

    3、DP159 works in X-mode mode , IIC controller must to work at 400Khz？100Khz can work properly?

    Regards
  • 0 in reply to JMMN
    Prodigy 190 points

    hi,JMMN

    I am using the Xilinx  Display port(RX) IP v7.0 in my design with Zynq SOC。DP159 as the retimer

    1、In the initialization step，

    Write Address=0xE, Write Data=0x3

    Read Address=0xE, Read Data=0x1， The value read is not the same as the value written，Is this correct？

    2、While the DP159 is receiving the TPS1 pattern，the DP159’s PLL LOCK_COMPLETE status is 0 ，pll unlocked. AUX_SRCP has a frequency output but is not correct and always change  frequency.

    3、DP159 works in X-mode mode , IIC controller must to work at 400Khz？100Khz  can work properly?

    Regards

  • 0 in reply to doph hai
    TI__Guru 60865 points
    Hi Doph,

    1. Which pins are used as the clock lane? Is it lane 0? What does register 0x0D read back? Does it read back 0x02?
    2. What is the entire value of Page 1, register 0x00h?
    3. Yes, I2C must run at 400 kHz.

    Regards,
    JMMN
  • 0 in reply to JMMN
    Prodigy 190 points

    Hi,JMMN 

    1、 it read back 0x02

    Write Address=0xD, Write Data=0x2
    Read Address=0xD, Read Data=0x2

    2、yes ,it is the page 1 

    // TP1 Interrupt Handler
    ./i2capp /dev/i2c-0 w 0x5e 0x00 0x02
    ./i2capp /dev/i2c-0 w 0x5e 0x01 0x01
    ./i2capp /dev/i2c-0 w 0x5e 0x0B 0x33
    ./i2capp /dev/i2c-0 w 0x5e 0x02 0x3F
    ./i2capp /dev/i2c-0 w 0x5e 0x30 0x0F //1lane 0xE1; 2LANE = 0xC3 ;4lane = 0X0F
    ./i2capp /dev/i2c-0 w 0x5e 0x00 0x03
    ./i2capp /dev/i2c-0 w 0x5e 0x4C 0x01
    ./i2capp /dev/i2c-0 w 0x5e 0x4D 0x18 // hbr= 0x18 hbr2 = 0x08 rbr= 0x28
    ./i2capp /dev/i2c-0 w 0x5e 0x10 0x0F //1lane 0xE1; 2LANE = 0xC3 ;4lane = 0X0F
    ./i2capp /dev/i2c-0 w 0x5e 0x00 0x23

    ./i2capp /dev/i2c-0 r 0x5e 0x00 //read the PLL status 

    The correct value should read back  0xe3 or (bit6 is 1) ，but  the actual read value is 0x23 , pll unlocked 

    （wait seconds,Continuing to configure）

    ./i2capp /dev/i2c-0 w 0x5e 0x02 0x27 //hbr= 0x27 hbr2=0x5F rbr 0x1f
    ./i2capp /dev/i2c-0 w 0x5e 0x0B 0x30
    ./i2capp /dev/i2c-0 w 0x5e 0x01 0x02

    (To this step，read the addr 0x00 )

    /i2capp /dev/i2c-0 r 0x5e 0x00 //read the PLL status 

    The read value is now 0xe3 ,why? But the DP159 output clock is wrong

    3、IIC has been running at 400KHZ

    Regards

  • 0 in reply to doph hai
    TI__Guru 60865 points
    Hi Doph,

    Has this problem been resolved? If not, can you provide the frequency of the incorrect output clock?

    Regards,
    JMMN