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DP83620: Support on the thermal pad and layout for the DP83620

Part Number: DP83620

Hello TI,

I am in need of your opinion on the thermal pad design of the DP83620.

There is a recommendation of 3X3 through Hole via placement beneath the thermal pad of the IC which are to be connected to the ground net.

TI's application report SLUA271B also suggest that the designer can relax this 3X3 through hole vias and reduce its number, since for dense boards it might be difficult to route and get in touch with TI for thermal management recommendation if 3X3 is not used.

I am in such conditions where 3X3 via arrangement is becoming a challenge,

Also will these be simple vias or filled vias.??

It would be helpful if any inputs on this can be provided.

Thank you,