This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN65DP141: Example data of output jitter

Part Number: SN65DP141

Hi,

Please allow me to ask about example data of output jitter. The customer has considered to evaluate SN65DP141 and now they are requesting the example data of output jitter such as simulation result or actual measurement data for following data rate. It will be appreciated if you can share some example data.

・HBR
・HBR2
・HBR3
・RBR

Best Regards,

Satoshi / Japan Disty

  • Satoshi-san

    Please see the DP141 datasheet for the output referred noise. Being a linear driver, DP141 will clean ISI related jitter, but will not able to clean random jitter and non-ISI related jitter coming from the source, so the output jitter will vary from source to source. Why do they need an example data of output jitter?

    Thanks
    David
  • Hi David-san,

    I am working with Satoshi.
    Customer wants to simulate the output jitter accurately that they want to simulate even the additive Jitter (TJ = DJ + RJ)  that DP141 would add.
    I believe if there were IBIS-AMI model, thermal noise related RJ component may be included in the model. However, IBIS-AMI model is not ready, yet.

    So, do you have a measurement data of DisplayPort siganl generator DJ1, RJ1 and DP159 output DJ2, RJ2 information ?
    We can say that the subraction of the above would be the additive jitter (DJ, RJ, TJ) of the device.


    Best Regards,
    Kawai

  • Kawai-san

    The IBIS-AMI model will not include thermal noised related Rj components. This will have to be added to the simulation outside the model.

    I took a board that has DP141 on it and did a jitter measurement using D10.2 clock pattern at HBR2 5.4G. Below you can see the jitter measurement result. As you can see, we have plenty of margin against the DP spec. You can't measure the source+DP141 total jitter, and then subtract the source jitter as it is not actual representative jitter performance of DP141.

    Thanks

    David

  • Hi David-san,

    Thanks for your comment and the data. We had a request and questions from customer.

    1). Could you please take the similar jitter data with HBR3 ?

    2). For this test, I believe you are using BERT or simlar signal generator which the jitter can be ignored, am I correct ?

    3). Is there any way to estimate the random jitter which generated by DP141 ?

    Best Regars,
    Kawai
  • Kawai-san

    The source I have is a HBR2 source, so HBR3 testing is not possible.

    I don't fully understand question #2, this is TX compliance test, not RX JTOL compliance. Please see below diagram for the test setup, I am using a oscilloscope to capture the waveform. You can also take a look at Keysight DP compliance application note for more detail on the DP compliance procedure: www.keysight.com/.../DisplayPort_Compliance_Testing.pdf.

    Random jitter of DP141 would be around 25-50fsRMS.

    Thanks

    David

  • Hi David-san,

    Thanks for your continuous support.

    Q4).
    Customer requirement is the jitter measurement result for DP141. If you are using your PC, is DP141 used at the DP connector internal or external the PC ? Is your test set-up something like the followings ?

    Laptop PC (HBR2) ---cable---> DP141EVM ---> Test Adapter

    Q5).
    Could you please monitor the RJ, DJ, and TJ jitter information for the source HBR2 (Laptop PC) without DP141EVM ?
    Customer wants to know the jitter CT result difference between the source itself and after DP141.

    Since the DP141 is a "redriver" it would require DisplayPort signal input from the Source device.
    If tested with the above connection, there should be jitter from the source device.

    Q6).
    Is the DP141 RJ information of 25-50fsRMS applicable to all data rates, HBR1/2/3 ?


    Best Regards,
    Kawai
  • Kawai-san

    The setup is:

    Source (GPU + DP141) --- DP Connector --- Test Adapter --- Scope

    The GPU is a DP1.2 compliance GPU, and DP141 is on the same board as GPU, so the signal from GPU is not available for measurement.

    The Rj applies to all data rate.

    What is customer's concern? Why do they need to know how much jitter being added by DP141? The HBR2 compliance report I shared shows we have plenty of jitter margin, and DP141 contribution to the total jitter would be less than the source contribution.

    Thanks
    David
  • Hi David-san,

    Thanks for your support.
    I understand your test set-up and that you cannot take the data for HBR3.

    I believe customer wants to run simulation as close as the actual condition.

    We understand that the device has enough jitter margin from your measurement result.
    However, if the SOURCE had much worse jitter, which is still inside the CT requirement, this result would be much worse.
    That was why they were asking the jitter information of the source itself.

    Best Regards,
    Kawai
  • Kawai-san

    This is why we do the compliance testing at the DP output to make sure everything is within the DP spec. Not only is the source going to contribute its portion of jitter to the total jitter budget, jitter from power supply, clock source, PCB trace, etc would also contribute to the total jitter budget. For HBR2, you have total jitter budget of 400mUI. If a source that is going to take away significant amount of this total jitter budget, then the customer need to re-evaluate their source selection requirement.

    Thanks
    David