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SN65DP141: Example data of output jitter

Part Number: SN65DP141

David-san,

Please allow me to intervene into this Q & A pass.

In terms of questions from Kawai-san, let me add some comments.

1). Could you please take the similar jitter data with HBR3?

=> When you characterize DP141, didn’t you check the signal integrity of
the output from DP141, in HBR2 and HBR3 etc.
If so, can you share the jitter data?

2). For this test, I believe you are using BERT or similar signal generator which the jitter can be ignored, am I correct ?

=> The intention of this questions is to know the jitter included in the signal source.
   BERT may be uses as the signal source (Not bit error test) and id the jitter included in the
   output of the BERT is ignorable or not.

You mentioned, “You can't (?) measure the source+DP141 total jitter, and then subtract the source jitter as it is not
actual representative jitter performance of DP141”.

In order to know the DP141 additive jitter, I need to know the jitter included in the source.

Mita

  • Mita-san

    Please take a look at my response to Kawai-san on the test setup and jitter data. I am not using a BERT to generate the DP signal. I am using a off shelf product that has a GPU and DP141 on the same board to collect the jitter data. The GPU is a HBR2 DP1.2 GPU, so HBR3 data and GPU output data are not available.

    Attached is the captured HBR2 jitter data. In terms of Tj, you can see we have ~85% margin on this particular platform. This is the total jitter margin of GPU + DP141 with GPU contributing majority of jitter. What is customer concern on using DP141? As long as the source is DP compliant, DP141 will work properly.    

    Thanks

    David

  • David-san,

    Thank you for your responce.

    Mita