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TCA9406: Not switching on the A-side

Part Number: TCA9406
Other Parts Discussed in Thread: TCA9517

Hello,

I'm using the TCA9406 with strange behavior that I don't understand.

The 9406 is on the slave board.   The VCCB (5V) is on the connector side of the slave board.  The Master is wired into the slave board.  The master board has 2k pull-ups.  The VCCA (3.3V) is connected to an FPGA.

On the B-side I see the master clock and data but there are boards where either the clock or the data aren't getting driven fully low.  Some boards have a full swing on the clock but the data is switching only 1/2 scale.  Other boards it is just the opposite. 

On the A-side nothing comes out of the chip.  the SDA_A and SCL_A lines are in a high state.  I'm using the 9406 initernal pull-ups on the A-side.  There are no external pull-ups on the A-side.

Any ideas?

Rob

  • Hey Rob,

    Is the TCA9406 enabled? The internal pull ups are disabled if the device is also disabled.

    "On the B-side I see the master clock and data but there are boards where either the clock or the data aren't getting driven fully low. Some boards have a full swing on the clock but the data is switching only 1/2 scale. Other boards it is just the opposite. "

    Can you also provide scopeshots of the issues/irregularities you are seeing? It may also help me if you provide a schematic/block diagram incase I am misinterpreting something from your description.

    Thanks,
    -Bobby
  • Hi Bobby,

    Yes, the device is enabled.  It's tied directly to VCCA.  I'm not using external resistors on the A-side and the signals are high,  which would indicate to me the internal pull-ups are working and thus the device is enabled.  the scope shot of the b-side is attached.  no point in sending the b-side as the signals are high 3.3V.

    See attached pics of scope shots and schematic portion of the 9406 translator. 

    Rob

  • Hey Rob,

    That scopeshot is extremely odd, I've never seen an SCL signal get only pulled down to Vcc/2 before.

    Can you do me a favor? Please remove the TCA9406 device and repeat the scopeshot. I want to see if this device is defective. The only other thing I can think of that would cause this is a large series resistance on SCL that is half of the pull up resistor...

    Also, the schematic looks good to me. The pins match with the datasheet (sometimes a schematic/PCB error I see).

    Thanks,
    -Bobby

  • Hi Bobby,

    If I pull the part the master b-side signals swing full scale--no issues.   I could believe one bad part but we did a build of 5 boards and none of them are working.  Again, sometimes it's the clock not swinging full-scale and sometimes it's the data; but never do I see both good or both bad.  And on all the boards nothing is coming out on the A-side--both scl and sda are pulled high.

    Here is the scope shot with the 9406 removed.

    Rob

  • Hi Bobby,One correction.  We do have one board that seems like it sort of works but the signal quality is bad--see attached.  The fist shot is with both master scl and sda signals tied into the slave board.  The 2nd pic shows the signals when I remove either the master scl or sda.  Things clean up.  I am getting switching on the A-side of this board.

  • Hey Rob,

    "he fist shot is with both master scl and sda signals tied into the slave board. "
    In this image my guess on what is happening is the device is having its RTAs engaged while the master is trying to drive the signal low. The RTAs engage when SDA/SCL go below 30% VCCA then go above of 30% of VCCA. The VoL of the SCL/SDA do not look like they are actually anywhere near 30% VCCA. This leads me to think that it may be cross talk from SDA due to the RTA shooting through some parasitic capacitance into SCL and causing this to engage the RTA on SCL. Notice how the ringing on SCL is only present when SDA begins to go high while SCL is low. You can also see the opposite occurs; when SDA is low, SCL goes high with the RTA and there is cross talk that appears on SDA.

    "The VCCB (5V) is on the connector side of the slave board. The Master is wired into the slave board."
    You can also see the signal seems to overshoot in the second image. This seems to suggest that there may be some inductance in the line which is bad when you have an RTA.

    How long is your wire connecting the slave board and the other board? Is your wire a twisted pair?

    "The 2nd pic shows the signals when I remove either the master scl or sda."
    I assume in the second image you have the SDA disconnected from the TCA9406 while SCL is connected. SDA seems to stop seeing the cross talk and the SCL still overshoots due to inductance.

    I think right now though we need to try to figure out what is going on with the 4 non working boards. In the image you showed me (the one with TCA9406 removed) is the TCA9406 desoldered from the board? Where are you making your measurements (where is the probe connected to? R53 and R79 at SDA and SCL?)


    Thanks,
    -Bobby
  • Hi Bobby,

    Excuse my ignorance but what is RTA?

    The scope measurements thus far have been made at the master side. There is approximately an 18 inch harness separating the 2 boards. No, it is not presently a twisted pair, just discrete wires.

    Rob
  • Hey Rob,

    "Excuse my ignorance but what is RTA?"

    My apologies, it is short for rise time accelerator. The TCA9406 uses the rise time accelerators to drive the signal high faster.

    I've high lighted one of the RTAs above. Essentially the PFET turns on for a short duration to quickly charge the bus capacitance and then turns off. This helps to support the 1MHz clock speed due to the stricter rise time requirement for I2C at that speed.

    "There is approximately an 18 inch harness separating the 2 boards."

    Does not seem that long so the parasitic inductance SHOULD be minimal.

    "No, it is not presently a twisted pair, just discrete wires."

    Good, twisted pairs means the SDA and SCL would have more parasitic capcitance between the two (remember 2 conductors separated by insulation generates a capacitor).

    "The scope measurements thus far have been made at the master side."

    For these measurements, I think measuring closer to the TCA9406 would be preferred as we want to see what the device sees right now.

    1) Can you verify that the devices are soldered onto the board correctly? (Just want to be double sure that pin one of the device is on the PCB correctly) I've seen this mistake done several times before where the device is soldered 180 degrees around.

    2) Can you measure with a DMM the resistance from SDA/SCL of the device to where GND and also to the master SDA/SCL?

    EDIT: 3) Please also measure resistance from SDA/SCL of master to Vcc (5V)

    Thanks,

    -Bobby

  •  Hi Bobby,

    So, you don't think the spikes on the sda line coincident with the rising clock edges is an effect produced by the one-shots?   If i zoom in on the spikes their approx 30 ns wide.  isn't the one-shot 30ns long?

    Rob

  • Hey Rob,

    In that image, it does look like the RTA may be on for the 30ns on the purple waveform (it should be turned on if the signal goes over 30% of VCCA which it does).

    "isn't the one-shot 30ns long?"
    Yes.

    You can see the point where the RTA turns on in that image in the yellow when the slew rate goes from a slow rise to a fast slew rate and then when it peaks is when the RTA turns off.

    -Bobby
  • But why am i seeing it on the SDA line if it is being triggered by the SCL? The purple trace is the SDA line. the yellow trace is the SCL. Seems to me that the SCL one shot is affecting the SDA line.
  • but why does the scl one-shot affect the sda line?  the yellow trace is the scl; and the purple trace is the sda line.  

    also, it appears as if there are times when on the falling edge of scl the one-shot gets triggered.

  • Hey Rob,

    This is why I am thinking crosstalk is what is potentially triggering the SDA. The quick rise time could be shooting some current into the parasitic capacitance between SDA and SCL through the PCB traces. (Are SDA and SCL traces close to each other and long?)

    -Bobby
  • Rob,

    Here is an article I found which discusses cross talk (though this is through a cable), the idea is similar as long PCB traces which are close to each other plus a high dV/dT can generate positive swings (the article example shows a fast dV/dT on the falling edge but we have fast dV/dT on the rising edges):

    -Bobby

  • Hi Bobby,  Thanks.  I am familiar with this theory.   I really don't need this part's capability to drive at 1MHz.  And I missed the one shot function and the implication it would have on the design.  It was an oversight on my part.

    why would the one-shot trigger on the falling edge of the clock?  

    Rob

  • Hey Rob,

    "why would the one-shot trigger on the falling edge of the clock?  "

    I've seen only in one case where the TCA9406 introduced ringing during its falling edge. This was due to a large VoL plus noise which was close to the RTA trigger point. (In case you're interested):

    In your case, what we see is it looks like the SCL signal is overshooting which also could result in undershoots as well. Potentially you have a lot of inductance in your line causing inductive kickback which causes the signal to ring when SCL drives low. If the ringing were to ring up to the RTA trigger point (30% of VccA) then it is possible to trigger the one shot. (may help to zoom in during the ringing on SCL in the scopeshot to see if this is what is happening)

    This is what I think is happening as we can see SCL shoot over 5V when it goes high.

    I think to fix this, we can try to put a small series resistance (20 or 50 ohms) from the SCL of our TCA9406 to the master's SCL. This will help dampen it and slow down the dI/dT which is responsible for inductive kickback.

    -Bobby

  • The schematic does not show any decoupling capacitors. If they are indeed missing, you get ringing on the power and ground lines, which can cause all kinds of strange effects.

    And you might try to you remove all external pull-ups (although it's probably the effects if the switching currents, not the pull-up currents, that are the problem).

  • Hi Bobby,

    Attached are some recent scope shots.   One shows the rising edge of the clock's RTA affecting the data line; and the other one shows the rising edge of the data's RTA affecting the clock.  I've spliced in a series 33 ohm resistor on the SCL line in between the 9406 and the off board connector (5V) side with no change.  The traces on the slave board are 10's of mm apart on the master (5V) side.   I don't understand why the RTA of one signal is affecting the other.

    Yellow is SCL

    So no possibility there is something happening within the 9406?

    On the other issue where there was no signal coming out on the 3.3V side.  Turns out the devices were bad.  I swapped them out with new devices and the problem went away.

    Rob

  • Hi Bobby,

    The traces on the 5V side between the off board connector and the 9406 are mostly 10's of mm apart. There is a short point near the 9406 where they may be 4-5mm apart. length from the connector to the 9406 is approx 50mm.

    On the 3.3V side between the 9406 and the FPGA the traces are around 4-5 mm apart. The length from the 9406 to the FPGA is under 10mm

    Rob
  • Hey Rob,

    "On the other issue where there was no signal coming out on the 3.3V side.  Turns out the devices were bad.  I swapped them out with new devices and the problem went away."

    Good to hear you were able to find the root cause here.

    As Clemen's pointed out, we may want to populate decoupling caps on the VccA and VccB pins ensure the reference voltages are stable. VccA is what the device uses as the reference voltage for when the RTAs trigger, dips in VccA will affect the triggering threshold.

    "So no possibility there is something happening within the 9406?"

    Unless there is damage, this device has a history of being well behaved. The only issues I ever see with this guy is when RTAs engage due to reflections/noise. I haven't seen a case where there was something going on internally with the device (yet).

    Can you probe both sides of the device (SDA and SCL)? Right now we are only looking at one side of the device but we are not looking at the other side which could be the one triggering the RTAs. (Make sure to probe as close to the TCA9406 as possible for both sides) With this device, if one side engages the RTA then the other side will also engage. We want to make sure we are looking at the whole picture here.

    "I've spliced in a series 33 ohm resistor on the SCL line in between the 9406 and the off board connector (5V) side with no change."

    After looking at SCL/SDA on the 3.3V side, we may also want to introduce a 33 ohm series resistor on this side too (close to the TCA9406).

    Thanks,

    -Bobby

  • HI Bobby,

    The signals right at the chip don't look different from the shots I gave you yesterday other than the A side of the chip swings between 3.3.   I lifted pins 4 and 5 and the phenomenon still exists.  I placed a series resistor on the SDA line between the 9406 and the off board connector (B-side).  No change.

    I also monitored the power rails.  They're rock solid, no dipping and no noise.

    All of the following scope shots were with pins 4 and 5 lifted.

    The fist picture is pin 8 along with pin 4

    2nd (shows rising edge clock influence on data) and 3rd (rising edge of data influence on clk) are pins 5 and 4

    Yellow - clock

    Magenta - data

     Rob

  • Hey Rob,

    Are you able to possibly cut the trace on VccA and supply VccA with 5V (also make sure SDA_A and SCL_A are disconnected from any master or slave)? This will move up the RTA trigger threshold and we will be able to see if the waveform is able to recover from the (potential) crosstalk. To me it still looks like the RTAs of the SCL line are inducing current into the line and pulling the SDA up to the RTA trigger point.

    You mentioned that the purple line is the SDA-A side so that may help to explain the delay (Rdson from the TCA9406 pass FET will delay the parasitic capacitance on A side from charging up for a little). It looks like the rising waveform is slowing down but not fast enough because it still triggers the SDA RTA. By changing VccA from 3.3V to 5V the RTA threshold will shift from 0.99V to 1.5V, maybe allowing us enough margin to see if the signal is able to recover.

    I realize changing the VccA from 3.3V to 5V defeats the purpose of using this device but for debugging purposes I think it may be useful. If this is the case, we can also add some extra capacitance onto the SDA/SCL A side (100~200pF) to further slow down the rising edge induced by the cross talk and potentially go back to 3.3V on VccA.

    Also, what is the possibility for doing a board respin in case this is not a suitable solution? Swapping out the TCA9406 for TCA9517 (a true buffer) may be favorable though the downside is a static voltage offset on the B side (for 5V logic this is not an issue though.)

    Thanks,

    -Bobby

  • Hey Rob,

    Just wanted to check up on you. Were you able to resolve the issue?

    Thanks,
    -Bobby
  • Hi Bobby,

    Sorry, I was off on other things.

    I did the test you suggested but to no avail.  The spikes are still there.  Attached is a picture of the re-work.  It's tough to tell but I've lifted pins 3, 4, & 5.   I then connected (via wire) pins 7 and 3.

    Regards,

    Rob

  • Hey Rob,

    Thanks for the update.

    I've poked around looking for a pin to pin replacement which doesn't have RTAs but I wasn't able to find one for you.

    I think the only other solution here is to use a different device such as TCA9517 (unfortunately this would require a board spin).

    Thanks,
    -Bobby
  • Hi Bobby,

    My plan early on was to switch to another device.  We have to re-spin the boards for other reasons so not a big deal.

    Much obliged for all the help. I wish we could've nailed down root cause. 

    Take care,

    Rob