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TCA9406: Inquiry regarding Power Supply Recommendations

Shinichi Inoue
Guru 19671 points
Part Number: TCA9406

Dear Specialists,

My customer is considering TCA9406 and has a inquiry.

I would be grateful if you could advise.

---

According to "10 Power Supply Recommendations" in the data sheet of TCA9406,
“To ensure the high-impedance state of the outputs during power up or power down, the
OE input pin must be tied to GND through a pulldown resistor and must not be enabled until VCCA and VCCB are
fully ramped and stable.

Is this mandatory?

Ensuring high impedance of output if not needed, can the OE pin be high?

The connection of the TCA9406 are both microcomputers.
The pins of the microcomputer are high impedance until the power supply is stabilized.
For this reason, I thought that there was no problem even if the output of TCA9406 was not high impedance.

---

I appreciate your great help in advance.

Best regards,

Shinichi

  • 0
    TI__Mastermind 49110 points

    Hey Shinichi,

    The reason you would want the level-shifter to be hi-impedance is to ensure any slaves on the bus do not see any glitches/start conditions and any clock pulses which could end up getting the state machine of a slave into an undefined state (latched SDA in worst case).

    If the only devices on the I2C bus are the two 'microcomputers' and you can ensure that they won't see any glitches then this should be okay. Otherwise, I would recommend you follow what the datasheet states.

    Thanks,

    -Bobby

  • 0 in reply to BOBBY
    Guru 19671 points

    Hi Bobby,

    Thank you for your reply.

    I'll share your suggestion with the customer.

    I appreciate your great help.

    Best regards,

    Shinichi

  • 0 in reply to Shinichi Inoue
    Guru 19671 points
    Hi Bobby,

    I sent your suggestion to the customer, he has an additional question.

    I would be grateful if you could advise.

    ---
    Thank you for the answer .

    Does the glitching clock pulse occur when the power supply is unstable?

    You mentioned that there is no problem if you can ignore the MCU.
    In this case, the MCU is reset and not operating during power-on / power-down because the power supply is unstable.
    The glitch or clock should be ignored because it is not working.

    Is it OK to think that there is no problem?
    ---

    I appreciate your great help.

    Best regards,
    Shinichi
  • 0 in reply to Shinichi Inoue
    Guru 19671 points
    Hi Bobby,

    This is a reminder I am looking forward to waiting for your advise.

    I appreciate your great help.

    Best regards,
    Shinichi
  • 0 in reply to Shinichi Inoue
    TI__Mastermind 49110 points
    Hey Shinichi,

    Sorry, I didn't see your post until your last one.

    "Does the glitching clock pulse occur when the power supply is unstable?"
    It shouldn't but you may need to be more specific by when you say power supply is unstable. A little bit of ups and downs (~100mV peak to peak) on a 5V rail probably won't cause any issues but something like a high frequency 2V peak to peak swinging could be a problem on a 3.3V rail.

    "because the power supply is unstable."
    Can you provide a waveform for me? This will give me a better idea of what you are seeing.

    "The glitch or clock should be ignored because it is not working.
    Is it OK to think that there is no problem?"
    This will fundamentally be a question of software on both processors. If they are both programmed to ignore inputs until a certain time/command is received then I suspect this is okay. If they turn on and automatically look at the I2C lines, then we may have a problem.

    -Bobby
  • 0 in reply to BOBBY
    Guru 19671 points

    Hi Bobby,

    Thank you for your reply.

    I'll share your answer with the customer.

    At this time, the customer is only considering concept, he doesn't have a power up waveform.

    I appreciate your great help.

    Best regards,

    Shinichi