DS90UB936-Q1: DS90UB935/936-Q1 I2C bypass Question

Chun Youngsu

Part Number: DS90UB936-Q1
Other Parts Discussed in Thread: DS90UB934-Q1, DS90UB935-Q1

Dear TI Team,

I want to implement it as shown in the figure.

I2C connection in the direction of the red color arrow to initialize the DS90UB935 / 936, activate it in I2C bypass mode, and connect to the black color I2C line.

I want to see if it can be implemented with TI Serdes.

In order to set the image sensor on the MCU, the I2C line should be connected and ask.

Thanks.

over 4 years ago

0 Steven(Shenzhen) Shi over 4 years ago

TI__Mastermind 30515 points

From the I2C operation in both read and black path, both can work. but you need take care of:

1. Ap control and MCU control, pls separate it in case of confliction.

2. the I2C addr. and slave alias name should be different.

best regards,

Steven

0 Chun Youngsu over 4 years ago in reply to Steven(Shenzhen) Shi

Expert 2485 points

Dear Steven,

Thank you for answer.

One more question.

I would like to know the delay time converted from FPD LINK III to MIPI signal.

Can you think of the red color shown in the figure below as the delay time for the data to be output?

For DS90UB934-Q1 Deserializer Delay is specified in the Data Sheet, but DS90UB936-Q1 is not specified.

please check.

Thanks.

0 Steven(Shenzhen) Shi over 4 years ago in reply to Chun Youngsu

TI__Mastermind 30515 points

Hi,

this is standard DPHY spec. (936 follows up DPH6Y 1.3 spec.), you can get the spec. in the CSI2 driver device such as ub936/ub954.

the ub934 is not mipi based device, you can't get the DPHY spec. here.

best regards,

Steven

0 Chun Youngsu over 4 years ago in reply to Steven(Shenzhen) Shi

Expert 2485 points

Dear Steven,

Thank you for answer.

I made the following calculation through data sheet and mipi spec.

Can you confirm that it is correct?

DS90UB935-Q1

0 Steven(Shenzhen) Shi over 4 years ago in reply to Chun Youngsu

TI__Mastermind 30515 points

Hi Yongsu,

are you talking the I2C delay? if yes, pls refer to d/s http://www.ti.com/lit/ds/symlink/ds90ub935-q1.pdf page26.

if you are talking the video latency, it is about dozens of us level. in the de-serializer with CSI port, it has one FIFO to store one line data and maps the video signal to CSI2 output.

regards,

Steven

0 Chun Youngsu over 4 years ago in reply to Steven(Shenzhen) Shi

Expert 2485 points

Dear Steven,

I am inquiring about data conversion.

After the Lock and I2C initializations are completed normally,

Only you only need to know the delay time for data conversion.

Thanks.

0 Steven(Shenzhen) Shi over 4 years ago in reply to Chun Youngsu

TI__Mastermind 30515 points

Yongsu,

From the CSI2 input to our serializer to the CSI2 output from our de-sterilizer, the delay is mostly from the de-sterilizer side. as I mentioned, the de-ser has one internal FIFO to store one line video data and then maps it to CSI2 port, this is the key contribution for the total link video delay, it is about dozens of us level.

For the serializer delay, it is ~hundreds of ns level.

regards,

Steven

0 Steven(Shenzhen) Shi over 4 years ago in reply to Steven(Shenzhen) Shi

TI__Mastermind 30515 points

Yongsu,

Please note you can't calculate the UB936's delay. UB936 has one internal FIFO bridging the FPD-Link and CSI port, this is the key contribution as I mentioned which has ~dozens of us level (dependent on the line length in your system). So the total link delay (including cable) is <100us generally.

btw, may I know how you care for this delay?

best regards,

Steven

0 Chun Youngsu over 4 years ago in reply to Steven(Shenzhen) Shi

Expert 2485 points

Dear Steven,

We are trying to design for H Company.

In order to check the delay time of the final image data in the structure where the first inquiry was made, it is necessary to calculate the delay time.

We need to know the delay time from input of image data to the output of Serdes internal block.

This condition is to tell the delay time when only the image data is input-output in the active state.

Please help us to verify.

Thanks.

0 Steven(Shenzhen) Shi over 4 years ago in reply to Chun Youngsu

TI__Mastermind 30515 points

Hi Yongsu,

Yes. For any port (FPD-Link channel), it has one FIFO to store one line video data, then this line data can be forwarding with RR mode or Sync. mode to the CSI port.

regards,

Steven

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DS90UB936-Q1: DS90UB935/936-Q1 I2C bypass Question