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TPS65987D: I/O Config: AMSEL Event

Part Number: TPS65987D
Other Parts Discussed in Thread: HD3SS460,

Hi,

In my customer, we are using TPS65987D together with HD3SS460 and set I/O config for AMSEL Event.

Question: Do this GPIO (using GPIO0) AMSEL Event supports HD3SS460 VIL, VIH and VIM voltage levels shown below? 

The issue is that we measured AMSEL voltage to be 1.1V for VIM (mid level) when VCC = 3V. It should be 1.2V (min). GPIO0 (AMSEL) is connected directly to AMSEL pin of HD3SS460.

  

Thanks.

Gim Song

  • Hi Gim,

    Thanks for the question on this. As you mentioned with the VCC is 3V only. Could you please see how is the result with 3.3V?

    Thank you,

    Oliver

  • Hi Oliver,

    We have tested with VCC=3.3V for HD3SS460 and AMSEL pin is around 1.1V ~ 1.2V.

    Based on TPS65987D datasheet, section 8.3.9.1 General GPIO, what is the description and selection for GPIO_OD_EN, GPIO_OE and GPIO_DO? I assume that GPIO_PU_EN is Internal Pull Up Enable and GPIO_PD_EN is Internal Pull Down Enable.

    Please share with me what are the mid-voltage levels with these settings when GPIO is in Hi-Z mode. 

    Alternatively, should we have an external circuitry which has a weak pull-up and pull-down to achieve a mid-rail voltage?

    Thanks.

    Gim Song

  • Hi Gim Song,

    Could you please try to duplicate the issue on the EVM? Let's try to isolate the problem on HD3SS460 or 987. This will really help a lot to debug from our side, thank you.

    Regards,

    Oliver

  • Hi Oliver,

    We tested on TPS65987EVM and loaded pjt settings where GPIO0 is set to AMSEL. After plug in USB3.0 dongle (connected) on Type C port, LED D13 not lighted up and measured 0.02V on pin8 (expansion connector). When plug in DP on Type C port, LED D13 lighted up.

    It seems like TPS65987D does not provide mid-voltage range during Hi-Z to meet tri-state for AMSEL requirement.

    Based on the datasheet, GPIO_RPU (pull up resistance) is 100k and GPIO_RPD (pull down resistance) is 100k.

    I've checked with HD3SS460 team regarding this tri-state for AMSEL. The recommendation is to add an external circuitry which has a weak pull-up and pull-down to achieve a mid-rail voltage. May I know if there is any concern on this?

    Thanks.

    Gim Song

     

  • Hi Gim Song,

    May I know when you discover this issue is under which DP assignment? Assignment C or Assignment D?

    Thanks,

    Oliver

  • Hi Oliver,

    If you refer to HD3SS460 datasheet, this AMSEL mid voltage is from muxing of USB signals SSRX/SSTX to CRX1/CTX1 or CRX2/CTX2. Please refer to the muxing below

    We do not have any problem with DisplayPort (DP) muxing as EN pin is GPIO (Plug Event, High or Low).

    Thanks.

    Gim Song

     

  • Hi Gim Song,

    Please enable the internal pull up & pull down at your 987 GPIO AMSEL Config. Please let me know the result, can you see 1.6V or not.

    Thanks,

    Oliver

  • Hi Oliver,

    Our customer has verified and able to can get AMSEL at 1.612V after setting internal pull up and down resistor in TPS65987D configuration. USB3 and DP function is good. They will continue to verify more boards.

    They suggested that TI should make this AMSEL setting automatic (default) set both the pull up and down resistor in TPS6598x Application Customization Tool. They have spend a lot of time and effort to debug the mid voltage issue.

    Appreciate your support on this.

    Thanks.

    Gim Song

     

  • Hi Gim Song,

    Good to know that the AMSEL works normally. Thank you for your feedback. I will send it back to the team.

    Thanks,

    Oliver