TCA9539-Q1: INTB=Low when startup, input signal edge polarity setting for INT

Hi Bobby,

1. we are seeing INTB low when powered on first time, which means everything is fully discharged. could you explain more specifically what the possible cause is?

Also, you mentioned that input state change during power up could also cause INTB Low. Could you tell me when device start accepting the state change? how many nsec or micro sec after Vin crossed the POR threshold? Also could you tell me when INTB will become high after Vin crossed the POR threshold?

2.  The TCA9539 detects both rising and falling, but Is there any device that supports selective detection of rising/falling edge?  hopefully configurable which edge to trigger. 

Hello Bobby

Could you give me response?

Hello

Let me check my understanding

1. Polarity inversion registers are  only  effective when P port is set to output.

2. When p-port is set to input and the input stage is low,

The INTB will pulled low when the  p-port ‘s rising edge.

And then INTB will be pulled high when p-port falling edge.

3. When INTB is already pulled low by detecting input state change, the following input state change will be ignored (not reflected to INTB pin).

Is my understanding above correct?

Hi Takuma-san,

1. The Polarity Inversion registers allow Polarity Inversion of pins defined as inputs in the Configuration register. This does not effect the polarity of pins configured as outputs.

2. INTB will trigger if any p-port input state differs from its corresponding input port register state. This feature is not edge based, but rather compares the current state of the pin to what the state was when the register was last read.

3. Yes, any further state changes that are detected before the interrupt circuit is reset will be ignored (unless the change that triggered the interrupt reverts back to the state stored in memory). Resetting the interrupt circuit occurs when data on the port is changed to the original setting or data is read from the port that generated the interrupt.

To add to Bobby's comments above, note that it is common for the INTB pin to indicate a false interrupt when configuring an I/O from an output to an input. Interrupts during device configuration should be cleared before normal operation begins.

I hope this helps clarify.

Regards,
Eric

hello Eric, 

Thanks for the comment. 

One thing i want to know, what is the usecase of polarity inversion? when it is useful? 

Ito

This is a good question. I'm actually not certain of the intended use-case for the polarity inversion feature. My initial thought is it may help simplify software conversion so that code can be modified in the initialization stage only and allow other functions that would expect inversion to operate normally. It may also be left over from the design process and simply left in as a feature without a particular implementation in mind.

I am curious how this feature may appear in actual end-cases. I'll let you know if I come across any examples.

Regards,

Eric

Hello, 

Let me check my understanding,

1. If the polarity inversion is used, the input high will be reported as “0” in the register, and input low will be reported as “1” in the register, it does NOT invert the polarity of /INT output polarity, correct?
2. The device detects input pin state change and report interrupt. You mentioned that the device doesn’t detect “edge”. How does device detect input state change? Is that done by polling the pin state?
3. At which timing does the device detect the initial input value low or high? Is that right after the reset?

Ito

Hi Takuma,

1. If the polarity inversion is used, the input high will be reported as “0” in the register, and input low will be reported as “1” in the register, it does NOT invert the polarity of /INT output polarity, correct?

   Yes, polarity inversion only impacts the use of the Input Port registers. 

2. The device detects input pin state change and report interrupt. You mentioned that the device doesn’t detect “edge”. How does device detect input state change? Is that done by polling the pin state?

   Interrupts are generated using a voltage threshold comparison of the input’s saved state and the pin’s current state. There is no polling. The interrupt is done through digital logic as shown in the block diagram:

   1. 

3. At which timing does the device detect the initial input value low or high? Is that right after the reset?

The /INT pin is cleared during the ACK period of a read command and the input state is stored as reference for further changes. I suspect that this is also done during the reset time tRESET during startup, likely less than 100ns after Vcc goes above Vcc_mv (assuming reset is tied to Vcc). 

Let me know if there's anything else you would like to check.

Regards,

Eric

Hello Eric

there is a comment that the register returns to default values as shown below. And default value for input ports are X. So after POR, does the device immediately reflects input port level to the input port register? Is that happen in ~100ns range? 

Hi,

When the device starts up, the default values of the Input Port Registers will be set to the current state of the external logic level. This is done at some point within tRESET of when Vcc goes above Vcc_mc. Without having specific validation testing for this timing, I cannot say exactly when in this period this occurs.

I understand the problem that you were encountering was the INB pin latching low after a Power On Reset (PoR). This can be caused by floating or changing states in the P-ports right after power-on (after the Input Register has saved the port default 'x' states). This can also be caused by a bad PoR for the device. This can occur when Vcc acts outside of the parameters in Table 8 of the datasheet such as Vcc_RT > 0.1ms.

Are you still experiencing this issue? If so, could you please provide the following to help diagnose:
1. What is the state of the P-pins during power-up? Are pull-up resistors present? Are any pins floating?
2. How does the Vcc line behave during power-up? Is there a steep rise time that could violate Power-On Reset Requirements? Would you be able to provide scope shots?

Regards,
Eric