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DS90UB962-Q1: DS90UB962-Q1 Configuration inquiry

Part Number: DS90UB962-Q1
Other Parts Discussed in Thread: DS90UB936-Q1, DS90UB933-Q1, DS90UB935-Q1

Dear TI Team,

For the configurations shown below, I would like to know if video is being received from the DS90UB962-Q1

without loss when sending images with Embedden Data On.

DS90UB933-Q1(Raw12bit) --> DS90UB936-Q1 --> 1port(2Lane) ISP Input 

                                                                                  1Port (2Lane) DS90UB935-Q1 --> DS90UB962-Q1

Thanks.

  • Hello Chun,

    I do not see any problem with the configuration. With DVP mode (933), you can program up to 3 of the first long packets to be sent as embedded data packets using the register 0x4B. Are you experiencing an issue?

    Best Regards,

    Casey 

  • Dear Casey,

    Thank you for answer.

    In the datasheet, RAW_EMBED_DTYPE does not affect CSI-2 receivers. It is called.

    I would like to check below.

    embedded data in parallel data When data is sent, the output is output to the DS90UB936-Q1 CSI-2.

    This signal When transferring signal output from the DS90UB935-Q1 to the DS90UB962-Q1,

    I want to see if it is possible to transfer data without losing onboard data.

    Can I transfer built-in data as well as video data?

    ex) 

    For example, if 3 packets is embedded data when sending 1000 packets,

    dS90UB933-Q1-> DS90UB936-Q1-> DS90UB935-Q1-> DS90UB962-Q1

    in the DS90UB962-Q1 architecture still receive 1000 packets including embedded data?

    Thanks.

  • Hello Chun,

    Yes this is possible and you will not lose the 3 packets of embedded data in this architecture.

    Best Regards,

    Casey