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TDP158: Design Review and Improvement: HDMI bit error at 4K60 RGB

Prodigy 85 points

Replies: 5

Views: 74

Part Number: TDP158

Hello, 

I am looking for help reviewing a design with TDP 158. 4K60 is working, but I am troubleshooting some issue with video pixel errors. 

Thanks, 

Cristino

  • Cristino

    Are you using the DP158 on the source side or the sink side? 

    On the source side, have you take a look at the eye diagram at 6G? And have you tried to tune the EQ to see if it helps with the video pixel error?

    Thanks

    David

  • In reply to David (ASIC) Liu:

    Hi David, 

    I am using TDP158 in HDMI mode under pin strap configuration with 3dB of EQ on the source side. The output of an HDMI transmitter feeds TDP158 and then the output of TDP158 serves to connect to monitors using 1m, 2m,3m+ HDMI cables. Currently I am using a 2m cable on the output of TDP158 and I see pixel errors using QD980 test equipment. The cable is ok, since it doesn't produce pixel errors when tested independently. 

    As for eye diagram, I will setup and check. 

    But can you help with the following: 

    1. PCB layout includes a TPS65261 converter. The placement of the converter is next to HDMI lanes on the input side of TDP158. What parameters can I check on TPS65261 to make sure noise is minimized that might be affecting pixel errors on TDP158 HDMI lanes? Is there a preferred switching frequency that would lessen the likelyhood of resonance with the HDMI clock or data signals? I am not sure how much this may affect.

    2. Are VADJ and pre-emphasis options that might affect bit error on output of TDP158? Are there factors in my design that might help with such bit error issues?

    3. From an eye diagram, how can TDP158 adjustments help improve jitter, slew, and/or distortion failures? I have already determined that 3dB of EQ will give a good picture, but pixel error testing shows its not perfect. 

    I am new to HDMI high speed design, so any advice where good starting places beyond adjusting EQ would help. 

    Thanks,

    Cristino

  • In reply to Cristino Castro:

    Cristino

    I will let Buck Switching Regulators group answer your first question regarding the layout of TPS65261.

    What type of bit error are you seeing? Are you seeing a burst of errors or single bit error increasing over a period of time? 

    For 1m, 2m, 3m+ cable, are you seeing error with 1m or just 2m? If you don't see error with 1m, but are seeing error with 2m cable, then you may need to increase VSADJ and Pre-emphasis to compensate for the 2m cable loss.

    Having eye diagram would be the first step to determine if the issue is related to signal integrity or jitter. If the eye diagram includes random jitter histogram, then you can use the histogram to do a jitter analysis.

    Thanks

    David

  • In reply to David (ASIC) Liu:

    Christino,

    Can you provide your TPS65251 schematic and layout as fellas any waveforms that demonstrate your issue?

    Best  Regards,

    John Tucker

    BSR-MV DC/DC Applications

     

    “Working on an automotive power design? Read the E2E technical article Meet European Commission ADAS requirements with TI DC/DC for device recommendations and other helpful resources.”

     

  • In reply to JohnTucker:

    Christino,

    I will close this thread for now.  You may re-open it at any time.

    Best  Regards,

    John Tucker

    BSR-MV DC/DC Applications

     

    “Working on an automotive power design? Read the E2E technical article Meet European Commission ADAS requirements with TI DC/DC for device recommendations and other helpful resources.”

     

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