• State Resolved
  • Locked Locked
  • Replies 7 replies
  • Answers 1 answer
  • Subscribers 33 subscribers
  • Views 561 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB934-Q1: Back Channel GPIO Sampling issue

Samuel Shafer
Intellectual 390 points
Part Number: DS90UB934-Q1

Hello,

I am using the remote GPIO over back channel function (FPD-III) to transmit a 60 Hz frame sync signal from the DS90UB934 deserialer's GPIO0 pin to GPIO0 of the 935 serializer, and then to send that signal to the image sensor. This mode is described as the "Extenal FrameSync Control" function in the 934 datasheet. The SerDes system uses DVP Coax mode. 

The issue is that the signal coming out of the serializer is missing frame sync pulses, and those that do come out are of varying length. Whereas the pulses come out of the Des at 60 Hz and are always 15us, most Ser pulses are 12.4us, some are 24.8us, and some are 9.7us. See scope captures below:

Input waveforms (to Des GPIO0):

Output waveforms from (Ser GPIO0):

The input FrameSync pulses last for 15us, and the DVP mode's 83.5 KHz sampling rate implies sampling occurs every 12us. Why is the system missing so many samples?

I need to a frame sync to appear at a consistent 60 FPS. Outputting pulses of incorrect length at seemingly random intervals won't work for my video project. 

Has anyone dealt with this issue before? Any advice would be greatly appreciated.

Thanks.

Regards,

Sam Shafer

  • 0
    Intellectual 390 points

    Input waveform:

    Output:

    Update: With longer FS pulses, the clock actually does give 60 Hz waveforms. I changed the length of the FS pulses to yield a 50/50 duty cycle. The above waveforms were measured on the Serializer GPIO with the sensor disconnected.

    Why are the pulses doing this? The sensor will not be able to work with this signal.

  • 0 in reply to Samuel Shafer
    TI__Guru* 98495 points

    Hello Sam,

    There is definitely something going wrong here so we can help to figure that out for you. You mentioned you are using the 935 as the serializer for this application? Have you followed this guide for setting up DVP mode? For 935 -> 934 backwards compatibility there are a few extra considerations described in this app note regarding clocking and register configurations. 

    http://www.ti.com/lit/an/snla270a/snla270a.pdf

    Also have you confirmed that the deserializer is locked to the serializer by probing the LOCK pin at the 934? If the lock pin is toggling then it may indicate an issue with the link which could cause this type of behavior. 

    Best Regards,

    Casey 

  • 0 in reply to Casey McCrea
    Intellectual 390 points

    Hey Casey,


    Thanks for getting back to me. I have followed that guide.

    The lock is solid on the Deserializer side. I set my FPGA signal tap to trigger on that any edge of that pin; it doesn't trigger after initialization.

    I outputted the register settings of the SerDesdevices, and noted the ones that have changed between resetting the chips and my initialization functions. Those register settings can be viewed in the table file below. Any other registers not mention can be assumed to be default.

    FS Reg Drop.pdf

    Please do let me know if you find anything interesting. Thanks for your help.

    Regards,

    Sam

  • 0 in reply to Samuel Shafer
    TI__Genius 11340 points

    Hi Sam,

    It looks like you have GPIO0 output and input enabled on the 934. Could you turn off GPIO0 output (reg 0x10)?

    Best,

    Jiashow

  • 0 in reply to Jiashow Ho
    Intellectual 390 points

    Jaishow,

    Thanks for getting back to me with that good idea. I changed the register to turn off GPIO0_OUT_EN. The signal out of the 935's GPIO0 pin still looks identically bouncey though.

    Any other ideas?

    -Sam

  • 0 in reply to Samuel Shafer
    TI__Genius 11340 points

    Hi Sam,

    Could you try using internally generated framesync and see if it the same issue persist? You can refer to section 7.4.6.4.2 in the datasheet.

    Best,

    Jiashow

  • 0 in reply to Jiashow Ho
    Intellectual 390 points

    Issue solved!

    The internally generated frame sync test yielded the same result, which made me think to start from scratch and see which register setting broke the system. Sure enough, Serializer 935 regs 0x17 and 0x18 were on, making the GPIO into a volt meter as well as a frame sync. Once I turned off the voltage sensors, all is good.

    -Sam