Other Parts Discussed in Thread: ALP
Hello,
I am performing an eye diagram analysis on a SerDes link (941 <=> 948).
We already made some eye diagram with the 949 <=> 948 and it worked fine using the following:
CDR loop BW = Fpclk / 40
High pass filter order 2, Freq = Fpclk / 40
If i use the same configuration, the eye analysis is definitively NOK
If, i change the DSI CLOCK MODE to : Register (0x56 : BRIDGE_CLK_MODE = DSI Burst mode with internal ref), then it is ok:
Is there a specific CDR configuration for the 941 / 948 SerDes link ?
According to the 941 datasheet, the CDR BW is F/15 , but F is not clearly defined
Is there more jitter with the DSI PCLK in general ?
Thanks,
Best regards
Alex