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DP83822H: Phy link down and speed is stuck at 10mbps

Part Number: DP83822H

We are trying to configure the Phy with 100mbps with out auto negotiation on Zynq MPSoC with LWIP code.

But we are seeing the link is down and status shows it is configured at 10mbps. Register dump is attached

for your reference. Any help in understanding what is going wrong is greatly appreciated.

Reg     Value

0x0        0x100
0x1        0x784D
0x2        0x2000
0x3        0xA240
0x4        0x61
0x5        0x0
0x6        0x4
0x7        0x2001
0x8        0x0
0x9        0x0
0xA        0x100
0xB        0x100B
0xD        0x0
0xE        0x0
0xF        0x0
0x10    0x7
0x11    0x108
0x12    0x2000
0x13    0x0
0x14    0x0
0x15    0x0
0x16    0x100
0x17    0x02C9
0x18    0x400
0x19    0x8000
0x1A    0x0
0x1B    0x7D
0x1C    0x5EE
0x1E    0x2

  • Hi Yugandhar,

    From your register 0x00 status, it looks like the PHY is getting forced to 10Mbps full duplex. This can happen through software or hardware bootstrap resistors. Check if you bootup software is not accidentally writing 0x0100 to registers 0x00. If the software looks right, then check your strap resistors specifically on pins RX_D3 and RX_D0. These pins, if incorrectly strapped, can result in force 10Mbps full duplex mode.

    -Regards

    Aniruddha

  • Thanks for the support Aniruddha. Our hardware is strapped to operate at 100mbps but some how at power up it is reading only 10mbps. In software we are trying overwrite the BMCR (0x0000) register to operate at 100 mbps. But the LWIP code is doing soft reset of the Phy by writing Bit 15 of BMCR register later which is reverting speed to 10mbps. If we disable the soft reset we are not seeing link status UP in BMSR (0x01). Our hardware team is investigating the straps. Is there anyway we could configure the phy to 100mbps in software without resetting the Phy?

  • Hi Yugandhar,

    I am a member of Aniruddha's team and will continue to support you on this issue. In software, you should be able to write 0x3300 to the BMCR Register 0x0. Bit 9 is a self clearing bit, and you should read back 0x3100 afterwards. 

    Thank you,

    Nikhil