Hi Team,
My customer use DS250DF410 on board and have a question about clk input:
On the datasheet, it shows CAL_CLK_IN input voltage level should be 2.5V, but their on board XO output level is 3.3V. And they found refclk_det shows that the clk signal is detected.
1. If there will be any potential risk to using 3.3V input?
2. Do we have any recommend divider circuit?
Thank you.