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DS90UB960-Q1: 960 communicate with 933/953

Part Number: DS90UB960-Q1

Hi Team,

My customer do two versions V1 and V2 to debug 960 with 953 and 933. And meet some issue.

In V1.0 board, customer only debug 960 not use 954 at all. In V1.0 board, 960 could communicate with 933 and 953 successfully.

In V2.0 board , customer only change V1(954+960) to V2.0 board (960+960) and also the PoC Network. But in V2.0 board, 960 couldn't communicate with 933 and 953. And even couldn't find the IDx of I2C.

All the register setting in V1.0 and V2.0 are the same.

Since customer used to make 933 and 953 communicate successfully, I think the timing of 960 is ok, right?

Do you have some advice about this? May I ask whether it is mainly because of the POC network or timing?

V1.0 960 933 953 work normal.pdfV2.0 960 953 933 work abnormal.pdf

  • Hello Amelie,

    So to clarify the 960 is communicating with a 933 and a 954 or is it a 953?  The only thing that changed was an updated PoC network? Are you able to get a LOCK between these devices?  If you are not able to get LOCK between the devices than there is likely an issue with the channel.  Are you also able to pull some registers like 0x4D and 0x4E?

    Regards,

    Nick

  • Hi Team

    The problem described above is wrong!According to the block diagram, the communication between A IC and 933 is normal, but the communication between POC circuit and 953 is abnormal. When reading registers 0x4D and 0x4E, "lock" is not displayed.If the POC of communication between A IC and 933 is not changed to the REFERENCE POC of 953, it is found that register 0x4D and 0x4E are read.According to "Lock".When B IC communicated with chip 933, register 0x4D and 0x4E were read, "Lock" was displayed, but "BCC_CRC_ERROR" was found.When B IC communicated with 953, the read register did not show "lock".So I would like to ask, what effect does the POC circuit have on the signal?What kind of waveform can prove that the 960 emitted signal is normal for the hardware?What causes this phenomenon?

  • Hi Team The problem described above is wrong!According to the block diagram, the communication between A IC and 933 is normal, but the communication between POC circuit and 953 is abnormal. When reading registers 0x4D and 0x4E, "lock" is not displayed.If the POC of communication between A IC and 933 is not changed to the REFERENCE POC of 953, it is found that register 0x4D and 0x4E are read.According to "Lock".When B IC communicated with chip 933, register 0x4D and 0x4E were read, "Lock" was displayed, but "BCC_CRC_ERROR" was found.When B IC communicated with 953, the read register did not show "lock".So I would like to ask, what effect does the POC circuit have on the signal?What kind of waveform can prove that the 960 emitted signal is normal for the hardware?What causes this phenomenon?

  • Hello,

    So I want to clarify a little more.  The 960 can communicate with the 933 with the 2G PoC network?  But the 960 cannot communicate to the 953 with the 4G PoC network?  The networks shown in the datasheet are different to accommodate the different data rates for the different operating modes the 960 can support.  Also if you are switching between the 953 and 933 you will need to update the mode of the 960 by updating registers 0x58 and 0x6D.

    Regards,

    Nick

  • hello,

    Sorry, I'm so busy these days.The answer to your question is yes.However, some 960 ports can be successfully connected to 953 and 2G PoC network.However, no 4G PoC connection to 953 has been successful so far.If there is a chance that the connection to 953 will work, then the software approach must be fine.So I want to know how the hardware should be tuned to ensure every connection is successful.I hope you can consider the hardware aspect to solve the present question.

  • Hello,

    It sounds like the issue is related to the PoC network.  I would recommend that you try removing the first component in the 4G PoC network and powering the 960/953 separately.  If the devices can communicate then the PoC network is part of the problem and is interfering with the FPD-Link communication.  If this is the case then a closer look will need to be taken into the layout and channel requirements to ensure the PoC can operate properly. 

    Regards,

    Nick

  • Hello,

    According to what you said, it has been tested and can communicate. So how do I change it? What are the requirements for the power signal output to terminal 953? See if you can fix this problem by modifying the POC network.

  • Hello, 

    Requirements for the link quality can be found in the 960 datasheet under section 7.4.7.2 but if the PoC networks are ruining the quality of the link then the issue lies with the network.  Could be related to the layout of the network or the board.  I would suggest that section 10 in the datasheet be followed to ensure the link works properly.  As for the power signal requirements the image below shows that some recommendations for what it should look like.

    • VPoC supply noise must be less than 100mV peak-to-peak
    • VPoC pulse must be less than 500mV peak-to-peak (from image sensor blanking and valid periods)
    • VPoC slew rate must be greater than 100us/V

    Regards,

    Nick