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DS90UB954-Q1: I2C communication with DS90UB953 issue

Part Number: DS90UB954-Q1
Other Parts Discussed in Thread: ALP

Hi,

CAMERA --- SER --- DES --- CPU

We are using the SERDES to get images from a camera.
As the serializer is not directly accessible, we use the back channel to communicate with it.
Our SER-DES are configured in synchronous mode.

We have a bunch of i2c commands to setup the DES (and thus the Back channel) and then the SER. Then, we move the GPIO of the SER by i2c to reset our camera.
We encounter errors when trying to communicate through the backchannel with the SER (during its setup or during the GPIO manipulation).

Or Error, we do the following : check 0xd from DS90UB954 to have a proper status (0xdf) then retry the communication.

But we can still fail to communicate by i2c several time in a row.

On another hand, with try the BIST but after a successful SERDES configuration to have the back-channel enabled.

The BIST got several CRC errors but no parity errors.


Have you any advice from here ?


I can provide our initialization sequences and BIST activation sequence if needed.

Thanks a lot,

Mathieu

  • Hello Mathieu,

    Feel free to send over the sequence, I will look through it.  As for the CRC errors are you able to share the values of registers 0x4D and 0x4E?  If errors are occurring the first thing I recommend is to test the link between the SER/DES.  The document here https://www.ti.com/lit/ug/snlu243/snlu243.pdf?ts=1591325408427 shows how to use the MAP tool to find a good link.  

    Regards,

    Nick

  • Hi Nick,
    Thank you for your help.


    After the test, just before stopping the BIST, I got the following values:

    0x4D = 0x03
    0x4E= 0xFD // also go 0x4d or 0x6d on different run


    Below is the sequence used for the BIST. Lines starting with a "+" represent a shell command and those without a "+" the previous command output.
    So you have the sequence and the result in the same place. If it's too anoying to read, the script and the output are in attachment

    I'll anyway try the MAP tool.

    Thanks a lot,

    Regards,

    Mathieu


    + echo 'Pixium specific setup'
    Pixium specific setup
    + i2cset -y 0 0x30 0x4c 0x1
    + i2cset -y 0 0x30 0x58 0x5e
    + i2cset -y 0 0x30 0x5c 0x62
    + i2cset -y 0 0x30 0x01 0x1
    + sleep 5
    + echo -------------------------
    -------------------------
    + i2cset -y 0 0x30 0x4c 0x1
    + i2cset -y 0 0x31 0x49 0x28
    + echo 'BCC error status'
    BCC error status
    + i2cget -y 0 0x31 0x79
    0x00
    + echo 'SER General status 0x52 (Should be 0x45)'
    SER General status 0x52 (Should be 0x45)
    + i2cget -y 0 0x31 0x52
    0x45
    + echo -------------------------
    -------------------------
    + echo 'bist error count before bist on SER'
    bist error count before bist on SER
    + i2cget -y 0 0x31 0x54
    0x00
    + echo -------------------------
    -------------------------
    + sleep 1
    + echo 'read bist enable should be 0x0 or 0x8'
    read bist enable should be 0x0 or 0x8
    + i2cget -y 0 0x30 0xb3
    0x00
    + i2cset -y 0 0x30 0xb3 0x01
    + echo 'read bist enable should be 0x1'
    read bist enable should be 0x1
    + i2cget -y 0 0x30 0xb3
    0x01
    + sleep 1
    + echo -------------------------
    -------------------------
    + echo 'Read bist lock status (0x4D RX_PORT_STS1)'
    Read bist lock status (0x4D RX_PORT_STS1)
    + i2cget -y 0 0x30 0x4d
    0x33
    + echo 'forcing errors'
    forcing errors
    + i2cset -y 0 0x30 0xD0 0x1
    + sleep 10
    + echo 'Post bist Lock status (0x4D RX_PORT_STS1) should read 0x03 if OK. 0x13 if lock status change during bist'
    Post bist Lock status (0x4D RX_PORT_STS1) should read 0x03 if OK. 0x13 if lock status change during bist
    + i2cget -y 0 0x30 0x4d
    0x03
    + echo RX_PORT_STS2
    RX_PORT_STS2
    + i2cget -y 0 0x30 0x4E
    0xfd
    + i2cset -y 0 0x30 0xb3 0x00
    + i2cset -y 0 0x30 0x4C 0x00
    + echo -------------------------
    -------------------------
    + sleep 1
    + echo 'general SER status 0x52 (should be 0x4d)'
    general SER status 0x52 (should be 0x4d)
    + i2cget -y 0 0x31 0x52
    0x4d
    + echo 'general DES status 0x04 (should be 0xCF)'
    general DES status 0x04 (should be 0xCF)
    + i2cget -y 0 0x30 0x04
    0xdf
    + echo -------------------------
    -------------------------
    + echo 'BIST CRC Error Count on SER 0x54'
    BIST CRC Error Count on SER 0x54
    + i2cget -y 0 0x31 0x54
    0x06
    + echo 'Parity Error count MSB on DES 0x56'
    Parity Error count MSB on DES 0x56
    + i2cget -y 0 0x30 0x56
    0x00
    + echo 'Parity Error count LSB on DES 0x55'
    Parity Error count LSB on DES 0x55
    + i2cget -y 0 0x30 0x55
    0x00
    + echo -------------------------
    -------------------------
    + echo 'SER Device ID (should be 0x30)'
    SER Device ID (should be 0x30)
    + i2cget -y 0 0x31 0x00
    0x30
    + i2cset -y 0 0x31 0x49 0x28



    log_bist.txt
    Pixium specific setup
    -------------------------
    BCC error status
    0x00
    SER General status 0x52 (Should be 0x45)
    0x45
    -------------------------
    bist error count before bist on SER
    0x00
    -------------------------
    read bist enable should be 0x0 or 0x8
    0x00
    read bist enable should be 0x1
    0x01
    -------------------------
    Read bist lock status (0x4D RX_PORT_STS1)
    0x33
    forcing errors
    Post bist Lock status (0x4D RX_PORT_STS1) should read 0x03 if OK. 0x13 if lock status change during bist
    0x03
    RX_PORT_STS2
    0xfd
    -------------------------
    general SER status 0x52 (should be 0x4d)
    0x4d
    general DES status 0x04 (should be 0xCF)
    0xdf
    -------------------------
    BIST CRC Error Count on SER 0x54
    0x06
    Parity Error count MSB on DES 0x56
    0x00
    Parity Error count LSB on DES 0x55
    0x00
    -------------------------
    SER Device ID (should be 0x30)
    0x30
    
    
    bist_test_reset.sh.txt
    #set -x
    
    echo "Pixium specific setup"
    i2cset -y 0 0x30 0x4c 0x1
    i2cset -y 0 0x30 0x58 0x5e
    i2cset -y 0 0x30 0x5c 0x62
    i2cset -y 0 0x30 0x01 0x1
    sleep 5
    #i2cset -y 0 0x31 0x01 0x1
    #sleep 2
    
    echo "-------------------------"
    #Enable RX Port0 Writeon 954
    i2cset -y 0 0x30 0x4c 0x1
    #Clear CRC and BIST CRCerrors on 953 (0x49)
    i2cset  -y 0 0x31 0x49 0x28
    #Read BCC Error Status on 953
    echo "BCC error status"
    i2cget  -y 0 0x31 0x79
    #General Status of 953
    echo "SER General status 0x52 (Should be 0x45)"
    i2cget  -y 0 0x31 0x52
    echo "-------------------------"
    #BIST Error count before BIST on  953 (0x54)
    echo "bist error count before bist on SER"
    i2cget  -y 0 0x31 0x54
    echo "-------------------------"
    sleep 1
    echo "read bist enable should be 0x0 or 0x8"
    i2cget  -y 0 0x30 0xb3
    # Enable bist
    i2cset -y 0 0x30 0xb3 0x01
    # Check bist
    echo "read bist enable should be 0x1"
    i2cget  -y 0 0x30 0xb3
    sleep 1
    echo "-------------------------"
    #check bist lock status
    echo "Read bist lock status (0x4D RX_PORT_STS1)"
    i2cget  -y 0 0x30 0x4d
    # Force error
    echo "forcing errors"
    i2cset -y 0 0x30 0xD0 0x1
    # Forcing continuous errors
    #i2cset -y 0 0x30 0xD0 0x2
    sleep 10
    # Stop continuous errors
    #i2cset -y 0 0x30 0xD0 0x00
    # Read RX_PORT_STS1 on 954 (0x4D)
    echo "Post bist Lock status (0x4D RX_PORT_STS1) should read 0x03 if OK. 0x13 if lock status change during bist"
    i2cget -y 0 0x30 0x4d
    echo "RX_PORT_STS2"
    i2cget -y 0 0x30 0x4E
    #Disable BIST
    i2cset -y 0 0x30 0xb3 0x00
    #disable RX port 0
    i2cset -y 0 0x30 0x4C 0x00
    echo "-------------------------"
    sleep 1
    # check status
    echo "general SER status 0x52 (should be 0x4d)"
    i2cget -y 0 0x31 0x52
    echo "general DES status 0x04 (should be 0xCF)"
    i2cget -y 0 0x30 0x04
    echo "-------------------------"
    echo "BIST CRC Error Count on SER 0x54"
    i2cget -y 0 0x31 0x54
    echo "Parity Error count MSB on DES 0x56"
    i2cget -y 0 0x30 0x56
    echo "Parity Error count LSB on DES 0x55"
    i2cget -y 0 0x30 0x55
    echo "-------------------------"
    echo "SER Device ID (should be 0x30)"
    i2cget -y 0 0x31 0x00
    # clear bist error on SER
    i2cset -y 0 0x31 0x49 0x28
    

  • Hello,

    I think you setup is okay but the fact that errors are showing on 0x4E leads me to believe there may be some kind of link issue. Let me know what kind of results you get from the MAP tool. 

    Regards,

    Nick

  • Thanks for your help Nick.

    While waiting for the tools for using MAP I would like to know if It's possible to get the SP and EQ value used at runtime by the AEQ ?

    thanks,

    Regards,

    Mathieu

  • Hello Mathieu,

    It is possible to read current AEQ values from registers 0xD2 and 0xD3.  But the settings are meant to change automatically to adjust to changing cable characteristics. The purpose of the MAP tool is to find an ideal window of good AEQ settings to better adjust.

    Regards,

    Nick

  • Hello Nick,

    So reading from 0xD3 and apply it into 0xD4 should set the EQ value right ?
    But is it possible to get the SP value as well ? And then apply it thank to the IND_ACC_CTL  and IND_ACC_ADDR (0x4) registers ?

    As my setup is sometimes working, I would like to get the working values from the working setup and try to force them for latter boots.
    I know that the MAP tools will help me get the right value but that's for having an intermediate point...

    Regards,

    Mathieu

  • Hi Mathieu,

    So the MAP tool will help you find a working range of EQ and Strobe values that work.  The point of finding the window is that the working strobe/EQ values may need to change due to the changing characteristics of the cable over time.  I would suggest finding the window and just programming the min/max values and allowing it to adjust as needed.

    Regards,

    Nick

  • Hi Nick,

    I finnally got my devkit and the opportunity to run the MAP tool.

    As you can see, with the default settings, the criteria are not meet.

    But, when Clock/Data base delay are checked I got a must better diagramme

    So I tryed to modify the previous bist script to include those modification (c.f. attachment):

    i2cset -y 0 0x30 0xB0 0x4
    i2cset -y 0 0x30 0xB1 0x8
    echo "STROBE_SET[0x08]"
    i2cset -y 0 0x30 0xb2 81

    i2cset -y 0 0x30 0xD5 0xE2
    i2cset -y 0 0x30 0X41 0xB7

    And I still got CRC errors.
    Any idea ?

    Thanks,

    Mathieu

    bist_map.sh.txt
    #set -x
    
    echo "Pixium specific setup"
    i2cset -y 0 0x30 0x4c 0x1
    i2cset -y 0 0x30 0x58 0x5e
    i2cset -y 0 0x30 0x5c 0x62
    i2cset -y 0 0x30 0x01 0x1
    
    i2cset -y 0 0x30 0xB0 0x4  
    i2cset -y 0 0x30 0xB1 0x8
    echo "STROBE_SET[0x08]"
    i2cset -y 0 0x30 0xb2 81
    
    i2cset -y 0 0x30 0xD5 0xE2
    i2cset -y 0 0x30 0X41 0xB7
    
    
    
    sleep 5
    #i2cset -y 0 0x31 0x01 0x1
    #sleep 2
    
    echo "-------------------------"
    #Enable RX Port0 Writeon 954
    i2cset -y 0 0x30 0x4c 0x1
    #Clear CRC and BIST CRCerrors on 953 (0x49)
    i2cset  -y 0 0x31 0x49 0x28
    #Read BCC Error Status on 953
    echo "BCC error status"
    i2cget  -y 0 0x31 0x79
    #General Status of 953
    echo "SER General status 0x52 (Should be 0x45)"
    i2cget  -y 0 0x31 0x52
    echo "-------------------------"
    #BIST Error count before BIST on  953 (0x54)
    echo "bist error count before bist on SER"
    i2cget  -y 0 0x31 0x54
    echo "-------------------------"
    sleep 1
    echo "read bist enable should be 0x0 or 0x8"
    i2cget  -y 0 0x30 0xb3
    # Enable bist
    i2cset -y 0 0x30 0xb3 0x01
    # Check bist
    echo "read bist enable should be 0x1"
    i2cget  -y 0 0x30 0xb3
    sleep 1
    echo "-------------------------"
    #check bist lock status
    echo "Read bist lock status (0x4D RX_PORT_STS1)"
    i2cget  -y 0 0x30 0x4d
    # Force error
    echo "forcing errors"
    i2cset -y 0 0x30 0xD0 0x1
    # Forcing continuous errors
    #i2cset -y 0 0x30 0xD0 0x2
    sleep 10
    # Stop continuous errors
    #i2cset -y 0 0x30 0xD0 0x00
    # Read RX_PORT_STS1 on 954 (0x4D)
    echo "Post bist Lock status (0x4D RX_PORT_STS1) should read 0x03 if OK. 0x13 if lock status change during bist"
    i2cget -y 0 0x30 0x4d
    echo "RX_PORT_STS2"
    i2cget -y 0 0x30 0x4E
    #Disable BIST
    i2cset -y 0 0x30 0xb3 0x00
    #disable RX port 0
    i2cset -y 0 0x30 0x4C 0x00
    echo "-------------------------"
    sleep 1
    # check status
    echo "general SER status 0x52 (should be 0x4d)"
    i2cget -y 0 0x31 0x52
    echo "general DES status 0x04 (should be 0xCF)"
    i2cget -y 0 0x30 0x04
    echo "-------------------------"
    echo "BIST CRC Error Count on SER 0x54"
    i2cget -y 0 0x31 0x54
    echo "Parity Error count MSB on DES 0x56"
    i2cget -y 0 0x30 0x56
    echo "Parity Error count LSB on DES 0x55"
    i2cget -y 0 0x30 0x55
    echo "-------------------------"
    echo "SER Device ID (should be 0x30)"
    i2cget -y 0 0x31 0x00
    # clear bist error on SER
    i2cset -y 0 0x31 0x49 0x28
    

  • Hi Mathieu,

    So it looks like you set the AEQ and SFILTER to the green region specified by the MAP tool. Can you try and increase the dwell time to see if the area shrinks at all?  Also can I ask what length of cable you are using?  The green boxes indicate that over the dwell time no errors occurred, so I would suggest increasing the dwell time to find a more robust window.  

    Regards,

    Nick

  • Hi Nick,

    Thanks for the followup.

    Indeed, increasing the dwell time from 6s to 1min, shrink the diagramme.
    I have a 1m cable.
    With a previous version of the board containing my Serialiazer, I've no issue (no BIST error and fine MAP results), So I think the cable is fine.

    We also have done some routing review to make sure that we enforce Ti recommandations.
    So if you have any recommandation, feel free !


  • Hi Mathieu,

    So to clarify when you use the EQ between 3 and 4 and a strobe between 8 and 11 you still get CRC errors?  May be related to some power issue, are you able to ensure you are getting stable power to both sides of the link?

    Regards,

    Nick

  • Hello Nick,

    I'm currently working with Mathieu on this issue; we did some test with an EVM DS90UB954 connected by STP on our custom board with DS90UB953 :

    • When we define a specific range of EQ/ST and we activate clock/data base delay option, we obtain a more than recommended pattern on the Map tool (we have square of 4x4 green rectangle) and after, when we do Bist CRC test with the ALP  tool we have lots of errors:
      • I'm not sure the clock and base delay options stay active when we launch the bist CRC test after a Map test, as when I return to the Map tool, the options are no more activated : could you please give us command sequence to set manually strobe, eq and clock/data base delay option for an DS90UB954 ?
      • Is it possible to have succesfull result on Map tools (which means, for my undesrtanding, that forward channel is good) and have bad result on back channel? if yes, could you define us possible root cause?

    Thanks,

    Bastien

  • Hello Bastien,

    Due to the US public holiday our team members are our of office but we will follow up with you next week on Monday to continue this thread

    Best Regards,

    Casey

  • Hi Mathieu,

    It appears that you have a large enough window to work.  If you still get CRC errors across the link and you verified the layout meets TI's recommendations then it may be a bad cable.  Also if you are using a PoC network you could try to remove the network and power the devices separately to verify the PoC network is not causing the problem. Also verify that the power signals on each device are not noisy.

    Regards,

    Nick