DP83867IR: Fast gigabit Ethernet auto-negotiation

Hello,

Thanks for sharing your issue on the DP83867. What exactly is your question and issue about your design? Are you wondering why only 75% of your boards establish link within 1.5s?

Thanks for the clarity in advance,

Cecilia

Hi Cecilia,

No, all power cycles were performed using the same two boards.

I wonder why only about 75 percents of the power cycles established link in 1.5 seconds.

Thank you,

Itai Handler

Hello Itai,

These times look to be within the expected power up times. Times can vary based on the settings you have selected as well as whether you are forcing MDIX and speed. 

Do you have design constraints on the timings if they are less than 2 seconds?

Thanks,

Cecilia

Hi Cecilia,

I’m not sure I understand your question.

We have a design constraint on the timing to establish ethernet link. It has to be less than 2 seconds from powering on Board A.

Thank you,

Itai Handler

Hello Itai,

You may be able to reduce the link establishment time but forcing the correct speed and MDIX modes. Is that something you are able to do and test?

Thanks,

Cecilia

Hi Cecilia,

How can I force speed?

Does it require a hardware modification?

I think that the Xilinx ZCU102 board configures the PHY to advertise speeds 10, 100 and 1000 via straps, and I didn’t see a way to modify this behavior via software.

I did find a way to modify MDIX mode, however I think that it did not help by itself.

Thank you,

Itai Handler

Hi Itai,

Yes you can force speed through register configuration. Please refer to Reg 0x10 bit 13 for Speed Selection. You may try that and see if that helps as well.

Thanks,

Cecilia

Hi Cecilia,

I can only see that there are two Speed Selection bits in Register 0x0000 (bits 6, 13). I did not see any Speed Selection in Register 0x0010.

Anyway the datasheet states that these bits are relevant when auto-negotiation is disabled.

We need to work at 1 Gigabit speed, and as far as I know, auto-negotiation is mandatory at this speed according to the IEEE 803.2 standard.

Does this PHY support working at 1 Gigabit speed with auto-negotiation disabled?

Thank you,

Itai Handler

Hi Itai,

Yes my apologies I was referring to a different device datasheet. 

As you mention if you disable auto-negotiation you can force speed using register 0x0 bits 6 and 13. 

Speed Select (Bits 6, 13): When auto-negotiation is disabled writing to this bit allows the port speed to be selected.

11 = Reserved 10 = 1000 Mbps 1 = 100 Mbps 0 = 10 Mbps

Thanks,

Cecilia

Hi Cecilia,

If I understand correctly, auto-negotiation cannot be disabled at 1G speed because it is mandatory at that speed according to the IEEE 802.3 standard.

I performed a few experiments and found that I can achieve fast and stable 1G link up if I:

On board A manually force PHY settings to manual MDI, configuration, Manual slave single-port, and advertise only 1G (auto-negotiation is still enabled).

On board B, Manual MDI-X configuration, Manual master multi-port, advertise only 1G.

Fast AN is enabled on both ends.

The cable is a straight twisted pair cable CAT 6A.

Also note that I tested it on bare metal. While using linux, it changes PHY configuration and restarts auto negotiation.

Can you comment if that configuration is acceptable?

Thank you,

Itai Handler

Hello Itai,

I will need 1-2 days to review with my team to let you know if this configuration is acceptable.

Thanks,

Cecilia

Hi Cecilia,

I didn't understand why you cannot guarantee any number for link up time.

As I wrote before, both boards use the same TI PHY, and the settings of each PHY can be set as needed.

My experiments showed that it's working pretty well with the settings I described before, however I don't want to base our design on experiments.

Thank you,

Itai Handler

Hi Cecilia,

If I understand correctly, when working with Fast Link Detect (or “Fast-AN”) enabled, we don’t really conform to the IEEE 802.3 standard.

That may be acceptable.

However, are you sure that you cannot guarantee anything about link up time with Fast Link Detect enabled at both ends?

To remind: both ends use the same TI PHY.

As I wrote previously, I don’t want to base our design on results from experiments.

Is there any other TI 1 gigabit ethernet PHY which can guarantee something regarding Link Up time at this speed and using this cable type (RJ-45 CAT 6E)?

Thank you,

Itai Handler

Hello Itai,

Sure I will consult with my team to see if there are time specifications for fast link detect on both ends. 

Thanks,

Cecilia

Itai,

After reviewing with the team, it seems that even with fast link detect on both ends there still is no guarantee link up time.

The reason as I have mentioned before is because it is not an IEEE specification and TI can not guarantee a link time between this device and ALL other NON-TI PHYs. There would be many variables that could cause a longer link time from other devices so TI cannot guarantee the time. 

However, if you are able to repeat on many devices and confirm perhaps on an automated bench the link time, it can give you a distribution across devices of the link time. If you would like further support or clarification I will be happy to help. 

Thanks,

Cecilia

Hi Cecilia,

I don't understand your answer.

We are not concerned with NON-TI PHYs at all.

As stated before, the system will have two boards connected to each other using a RJ-45 twisted pair cable, and it is possible to put a TI PHY in both of the boards.

The question is whether or not TI has a PHY that can establish 1 gigabit ethernet link fast in this setup, and whether or not you guarantee anything about link up time.

Thank you,

Itai Handler

Hi Itai,

As mentioned regardless of settings or modes, we cannot guarantee link up time. We only have options to reduce the time which is what I had mentioned previously but again to reiterate it does not guarantee a certain time frame. 

Thanks,

Cecilia

Hi Cecilia,

I think that I understand now.

Please note that your advise to use manual MDI configuration was helpful.

I appreciate your time assisting me in this issue.

Thank you,

Itai Handler