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DS90UB941AS-Q1: Unstable link with forward channel dsi + back channel i2c and GPIO

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Replies: 21

Views: 225

Part Number: DS90UB941AS-Q1

Hello, 

We are using DS90UB941/DS90UB948 with LVDS display.

We are using 4lane dsi(input port1) and data on LVDS display is OK. 

reg dump of Ser-Des, 

i2cdump -y -f 2 0x1a
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 34 00 00 8a 00 00 58 50 50 01 ab 01 07 35 35 03 4..?..XPP????55?
10: 00 00 00 ff 00 00 fe 1e 7f 7f 01 00 04 00 01 00 ...?..?????.?.?.
20: 0b 00 25 00 00 00 00 00 01 20 20 b8 00 00 a5 5a ?.%.....? ?..?Z
30: 00 09 00 05 0c 00 00 00 00 00 00 00 00 00 81 02 .?.??.........??
40: 10 90 00 00 00 00 00 00 00 00 00 00 00 00 00 ac ??.............?
50: 16 00 00 00 02 10 00 02 00 00 d9 81 07 06 44 42 ?...??.?..????DB
60: 22 02 00 00 10 00 00 00 00 00 00 00 00 02 20 00 "?..?........? .
70: 78 ba a0 00 00 00 00 78 ba a0 00 00 00 00 80 00 x??....x??....?.
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
c0: 00 00 82 00 38 00 00 64 40 00 00 00 00 02 ff 00 ..?.8..d@....??.
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
e0: 00 00 82 00 28 08 00 00 00 00 00 00 00 02 00 00 ..?.(?.......?..
f0: 5f 55 42 39 34 31 00 00 00 00 00 00 00 00 00 00 _UB941..........

i2cdump -y -f 2 0x2c
0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
00: 58 04 00 f0 fe 9e 00 34 00 00 00 00 00 00 00 00 X?.???.4........
10: 00 00 00 00 00 00 00 00 00 01 01 00 03 13 53 05 .........??.??S?
20: 00 00 40 28 08 00 83 84 01 00 00 00 00 00 00 00 ..@(?.???.......
30: 00 00 90 25 01 00 00 9e 00 00 00 05 20 e0 23 00 ..?%?..?...? ?#.
40: 43 03 03 00 60 88 00 00 0f 82 00 08 00 00 63 00 C??.`?..??.?..c.
50: 03 10 00 01 80 00 00 00 00 7f 20 20 00 00 00 00 ??.??....? ....
60: 00 00 00 00 10 00 00 00 00 00 00 00 00 00 01 00 ....?.........?.
70: 00 00 00 07 07 08 00 00 00 00 00 00 02 00 00 00 ...???......?...
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
a0: 00 00 8c 00 00 00 00 00 00 00 00 00 00 00 00 00 ..?.............
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
c0: 00 00 00 00 00 00 00 00 c0 00 00 00 00 00 00 00 ........?.......
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
f0: 5f 55 42 39 34 38 00 00 00 00 00 00 00 00 00 00 _UB948..........

But with the event of interrupt(GPIO0) and i2c read to the slave device, Display is flickering and the link pin on UB948 is not stable.

We are not seeing any flickering in display when color bar enabled on the UB941. We have issue only when UB941 is processing DSI inputs. 

Any settings on UB941 can solve this issue?

Regards,

Manoj

  • Hi Manoj,

    Just to clarify a few things:

    The flickering only happens when I2C is read from 941 to the 948 and when there is an interrupt from the 948 to the 941? 

    Does this flickering stop after the I2C is read? 

    when you say "link pin" do you mean lock pin?

    What is the Pclk of the video being sent?

    Regards,

    Michael W.

  • In reply to Michael.Walker:

    Hello Michael, 

    Here is the flow, 

    1.Interrupt from 948--> 941--> soc

    2. i2c read request from soc--> 941--> 948 --> slave device(and requested data send back to soc). Along with video sometimes i2c read requests will be failed. And all the time's video flickering will be observed.

    When there is no video data to 941, interrupt, i2c read/write will be 100% success. 

    Yes, video flickering will stop after the above flow.

    yes, it is 948 lock pin.

    Pclk is 71.9Mhz.

    Regards,

    Manoj

  • In reply to Manoj kumar:

    Hi Manoj,

    When you are using the pattern generator of the 941 are you using the 941 internal clock or the DSI clock? your DSI clock is in continuous mode on the SOC correct? 

    If the video data and I2C reads fail like you have described the lock pin of the 948 should have dropped low, how are you monitoring the lock pin?

    Regards,

    Michael W.

  • In reply to Michael.Walker:

    Hi Michael, 

    Pattern generator is working without any issue on both internal clock and DSI clock..

    65h(PGCFG_PGCFG_P1 Register) --> 0x05  Color bar will be always ON.

    65h --> 0x01 Color bar will be ON when valid DSI clock input.

    DSI clock is set to HS clock always.

    Normally Lock pin will be high and with interrupt, i2c read/write lock pin will go low for few ms(we have test point to check), at the same time we see flickering on display.

    Regards,

    Manoj

  • In reply to Manoj kumar:

    Hi Manoj,

    What interrupt is present when the issue is happening? How often does this issue occur? Is the register dump you posted during when the issue is happening? if not can you capture a register dump when the issue is happening?

    Regards

    Michael W.

  • In reply to Michael.Walker:

    Hi Michael, 

    GPIO_0 or GPIO_1 will go low from high on interrupt(triggered by slave device connected to 948),

    Issue is seen every time with interrupts and flowed by i2c read/write.  Register dump is captured just after the issue.

    Regards,

    Manoj 

  • In reply to Manoj kumar:

    Hello Manoj,

    Due to the US public holiday our team members are our of office but we will follow up with you next week on Monday to continue this thread

    Best Regards,

    Casey

  • In reply to Manoj kumar:

    Hi Manoj,

    Can you disable any interrupts and I2C read or writes going to or from the SOC to the 941A once the link is up? Will the display flicker then?

    Regards,

    Michael W.

  • In reply to Michael.Walker:

    Hi Michael, 

    If we disable the interrupts and i2c read/write, the frequency of flickering is very less.  and it flickers every time with interrupts and i2c. 

    Regards,

    Manoj

  • In reply to Manoj kumar:

    Hi Manoj,

    This issue is seeming to be a signal integrity issue. Can you follow the 941AS and 948's datasheet and run BIST to confirm it is a signal integrity issue?

    Regards,

    Michael W.

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