Other Parts Discussed in Thread: AWR1243BOOST, AWR1243
We're observing that the DS90UB953-Q1 appears to fail to engage the internal termination resistors intermittently when input data is transmitted at 300 Mbps. When this occurs, the differential voltage increases from 200mVpp to 400mVpp due to the reflection caused by the unterminated line. This appears to be the similar to the issue reported here https://e2e.ti.com/support/interface/f/138/t/707177?DS90UB953-Q1-Data-Voltage-Variations
Why is the DS90UB953-Q1 failing in this way? How do we ensure it receives data correctly?
In the plot below the Channel 1 (yellow) is the CSI clock, and Channel 2 (green) is CSI data lane 0.
This image below shows a successful transition from LP to HS mode, while the second shows a failure in this transition where the internal termination appears to be turned back off just after -179 ns.
Why is the DS90UB953-Q1 doing this and how do we ensure it terminates correctly?
Thank you,
Christopher