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TL16C754C: reference design

Part Number: TL16C754C
Other Parts Discussed in Thread: TL16C554A, DS36954, SN74CBT16214

Hi,

Is there any example reference design or schematic available for TL16C754C? (like it is the case with many other components)?

Thanks & regards,

Gunther

  • Hello,

    Unfortunately I don't know of any dedicated reference circuits outside of the examples given in the datasheet. Are there any questions you have regarding how to connect the device? We are happy to help.

    Max

  • Hi Max,

    I am building a solution using a central controller which will be connected to remote sensor cards and BLDC motor driver cards using RS485 (modbus). Connecting everything together in daisy chain is not possible due to the cabling so I thought about putting multiple 1-to-1 "master-slave" connections in parallel (star schema).
    In order to get to that (and to take advantage of the FIFO buffers in the UARTs) I looked into this setup:

    multiple UARTs (TL16C554A) each connected to RS485 drivers (DS36954)

    This would however require lots of data lines from the controller to all UARTs. I thought about putting a mux (SN74CBT16214) between the controller and the UARTs which could multiplex the D0-D7 and A0-A2 lines.

    Would such a setup be OK or isn't it a good idea for some reason (I didn't see)?

    Thanks,
    Gunther

  • Hi Gunther,

    Will only one master-slave link be active at a given time, and will the master only receive data from slaves in response to a request (so that data reception is predictable and it does not need to listen to all slaves simultaneously)?  If so, perhaps an easier solution would be to use a single UART but multiple RS-485 transceivers.  The serial output (TXA) and serial input (RXA) of the UART could then fan out to each transceiver's D and R pins, and you could then use the driver enable (DE) and receiver enable (/RE) controls on each transceiver to make sure that only one "link" is active at a given time.

    Or, if you wanted to avoid the complexity of controlling the transceiver enable lines you could implement something like this reference design (which automatically controls the DE/RE lines and implements a 1:4 fan-out function):

    Alternatively, you could see if you could work around the physical layer limitations of the star network topology.  In some cases (fewer and shorter "spokes," lower baud rates, etc.) this can work without issue.  If you tell me more about how many nodes you have and what the cabling looks like I can try to give some more detailed guidance around this (although to be honest it is usually best to prototype these networks in the lab if you can).

    Max

  • Hi Max,

    After reading your suggestions and rethinking my setup a bit, I will try a combination of the suggested approaches:

    - try to link a few nodes on one cable in daisy chain.

    - use multiple transceivers on one UART for sequentially accessed nodes

    I intend to order some components and put all this together in lab environment to confirm the setup and verify the throughput. This would allow me to limit the setup to one UART chip which will reduce the complexity and the numerous IO lines.

    Thanks a lot for your input and to put me in the right direction.

    Gunther