DS90UB954-Q1: No 954/953 Link

Intellectual 840 points

Replies: 19

Views: 120

Part Number: DS90UB954-Q1

Hi All,

I have designed an impedance controlled PCB containing two DS90UB953s and a DS90UB954 as an alternative to your EVM that isn't compatible with our imaging modules.  I am using UMCC connectors and prewired UMCC coax (1/37mm dia 50 ohm coax a few inches long) to connect the 953s & 954.

Of the two 953's, one appears to have a broken ferrite because it has no DC voltage coming through the coax, but the other appears functional.  I am using RX1 on the 954 to connect with it.

I have the wrong bias resistors on the 954 mode pin (a single 10K to ground) that sets it for CSI-2 non-synchronous mode, when I really wanted CSI-2 synchronous back channel.  But I am assuming I can simply change register 0x58 to get into sync mode.

I can communicate with the 954 at address 0x60 as expected, but never see the LINK signal high.  I am using a 24 MHz reference clock (oscillator), and see 24 MHz on the 954's XOUT signal.  The frequency measurement register (xA5) consistently shows 23 MHz.  The link frequency (0x4F:50) always shows 0.

Both 953's are strapped for address 0x30 but at 1.8V (IDX has a 40.2K pull-down to ground), and mode is connected to ground with a 10.0K, which as I understand it, enables the synchronous back channel.  I assume I can change a register in the 953 to set the I2C bus for 3.3V operation.

I've tried setting register 0x4C to x12 (select P1), then setting 0x58 to 0x1E (BC on with CRC at 50 MHz) and 0x6D to 4 (coax mode), but none of these changes have made any difference to the LOCK state.

Can you point me in the correct direction to debug the link?

Thanks,

Scott

19 Replies

  • Hello Scott,

    Can you post your schematics for both sides here so we can review the connections? Seems like maybe a schematic connection issue 

    Best Regards,

    Casey 

  • In reply to Casey McCrea:

    Hi Casey,

    I've attached the schematic.

    Thanks,

    AJ-02-00734-1 SCH.pdfScott

  • In reply to Scott Grodevant:

    Hi Scott, 

    For a schematic review, I will need a few days to get back to you on this. Please give me until COB Monday. 

    Thanks, 
    Sally 

  • In reply to Scott Grodevant:

    Hi Scott, 

    Can you probe the DC voltage on the 953 at all the rails to make sure it is meeting the minimum voltage? Also do the same for the 954. Please make sure you probe after the ferrite bead - so closer to the pin.

    Can you also probe the supply noise after the PoC before the input to the voltage regulator? The differential supply noise should be less than 25 mV. What is the pulse amplitude and the slew rate of the pulse amplitude? Also please probe supply noise at RIN+ when 954 is powered down. The supply noise should be less than 10 mV. 

    For synchronous mode, is it possible for you disconnect the oscillator on the 953? Im not sure if it's currently populated on your board. 

    Please also check for line fault in register 0x4E on the 954. 

    Yes you can change the strap settings via register programming. 

    Have you already verified the power sequencing diagram according to the d/s?

    Does your oscillator connected to the 954 meet Table 3 specifications in the d/s? 

    Can you run BIST ? 

    That link has a BIST script.

    Can you run MAP in the ALP GUI on the 954? 

  • In reply to Sally Cheung95:

    Hi Sally,

    Sorry for the long delay, off on other projects.

    All the DC voltages are right on the mark.  The 953 supply measures 1.81V, the 954 supplies    measures 1.82 and 3.31V.  I've taken several scope traces of random impulse type noise on the supplies.

    The 954's oscillator is a Diodes Inc FJ2400002 1.8V oscillator and meets all table 3 specs.

    Since the 1.1V supply is internally generated (VDD_SEL=0), this isn't an issue, right?

    I haven't been able to run BIST with the connection errors.

    Thanks,

    Scott

  • In reply to Scott Grodevant:

    Hi Scott, 

    Its good that you verified the DC power of those supplies, but we also need to check the noise requirements. 

    There are two PoC noise requirements for the SER and DES:

    1.Requirement on the serializer side (Vpoc noise)
    Methodology:
    –Have the whole system (imager, serializer, and deserializer) running
    –The imager switching can introduce Vpoc pulse to the system
    –Measure the Vpoc noise at the input side of the DC-DC regulator on the serializer board
    •Set the scope to 0 to 50MHz bandwidth
    –Account for noise floor in the probe (Noise = measured noise – noise floor)
    Where to Probe:
    Probe after the PoC filter before the input of the regulator

    2. Requirement on the deserializer side (Rin+ noise)

    Methodology:
    –Connect the deserializer and serializer using a cable, turn on the power supply
    –Turn off the deserializer and serializer (by pulling the PDB low)
    –Measure the noise at the Rin+ pin of the deserializer
    •Set the scope to 0 to 50MHz bandwidth
    •Use a short probing tip for ground
    •Account for noise floor in the probe (Noise = measured noise – noise floor)
    Where to probe: Probe the Rin+ pin, probing at the AC coupling cap.
    What values are you getting? 
  • In reply to Sally Cheung95:

    Hi Sally,

    On the serializer side at the regulator input I measure 200-300 uV (rms) of noise after subtracting the 400-600 uV background noise value.  Its quite a noisy measurement as I am my scope's vertical resolution limit (10 mV scale).

    I am not able to communicate with the image sensor on the serializer side of the system so I am unable to make them stream data to contribute to system noise.  Without them, I measure 2.2mV of rms noise after subtracting the 800-900 uV of noise floor.

    When you mentioned grounding PDB on both ends, I noticed that I have not connected PDB on the serializers and the DS says they are pulled to the inactive state (low) with an internal 1M resistor, so I tried connecting these pins to 1.8V.  Unfortunately this didn't seem to make any difference.  I still read 0xD3 from status register 4 on the 954.

    Thanks,

    Scott

  • In reply to Scott Grodevant:

    Hi Scott, 

    It seems like the noise is ok, but just to isolate further, is it possible to power the SER independently? Do you guys have a way of supplying external power to the SER?

    Thanks, 
    Sally 

  • In reply to Sally Cheung95:

    Hi Sally,

    Referring to my original schematic, do you mean to isolate power by removing FB1 (FB2 or FB3) and wiring VLINK to +5 so the link isn't supplying the SER side power?  Sure I can do that.  Or do you mean supply power from some other source, such as a bench supply?  I can also do that.

    I just want to confirm that there are no I2C commands I need to send to the 954 establish the link with the 953s.

    Thanks,

    Scott

  • In reply to Scott Grodevant:

    Hi Scott, 

    The first option: removing FB1 (FB2 or FB3) and wiring VLINK to +5 so the link isn't supplying the SER side power. 
    You're correct, there shouldn't be any I2C commands that you need to send for establishing link. Just want to make sure you are strapped in the right mode. Looking back at your schematic, I see that you have 10kohm pull up/down resistors on the mode/idx pins for the 954. I initially assumed these were place holders, so I must ask if you ever updated the values. 

    Thanks, 
    Sally