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Part Number: PCA9535
In ORT for ASR920 platform, some of the boards are failing to respond to I2C Transactions at low temperature. We don’t see any ACK for master initiated transactions.
Does this device respond to bus recovery when I2C SCL line is pulsed for 9 clock cycles? We have having yield issues in factory and is getting escalated.
Can you provide any recovery mechanism for these devices when they fail?
Yes, pulsing SCL for 9 cycles should resolve issues related to the I2C state machine being stuck in an incorrect state. Have you had a chance to try this in your system?
If that resolves the issue, then there may be some glitch that occurs on the I2C lines during the temperature ramp. You may want to monitor SDA/SCL for this during the testing.
If the issue persists after pulsing SCL, it is possible there is some issue with voltage level compatibility or timing that is exacerbated at this temperature. If you have any waveform captures showing the issue we could help review them.
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