DS125MB203: DS125MB203: PCIe Link Up

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Part Number: DS125MB203

Hello 

We are using the DS125MB203SQ part for PCIe.

We are using one Edge connector and one mini PCIe connector and selection is controller through SEL 0 pin,

The device is connected to FPGA on one side(Supports Gen 3) and PCIe Edge conn and MPCIe connector on the other side.

We right now are using PCIe edge connector only with FPGA acting as an endpoint.

We are facing the issue, we are able to link up only at GEN 1, but our device support GEN 3.We need to get a link up at GEN 3.

Please see some more information below:

The track length from FPGA to DS125MB203SQ is around 3.5 inch and from DS125MB203SQ to PCIe edge connector is 1 inch.

PFA Schematic for the same, Kindly reviews and let us know the possible solutions.

Regards

Akash

1 Reply

  • Hi, some follow up questions to facilitate my debug:

    1. Related to: "We are facing the issue, we are able to link up only at GEN 1, but our device support GEN 3.We need to get a link up at GEN 3"
      • Have you measured the signal at the MB203 output? How does it look like?
    2. Please provide a full registers dump of the DS125MB203 settings you are using

    Cordially,

    Rodrigo Natal

    HSSC Applications Engineer

     

    We are facing the issue, we are able to link up only at GEN 1, but our device support GEN 3.We need to get a link up at GEN 3.