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Part Number: LMH1297
I am using LMH1297 for 12G SDI out and LMH0397 for 3G SDI In.
As per TI document SNLA288(12G-SDI Printed Circuit Board (PCB) Layout Guidelines) in section 9, its mentioned that for 75ohm signals the reference should be provided in Layer 3. But as per my stackup the reference for 75ohm signals is also provided in Layer 2. Will that cause any trouble in functionality of SDI.
Attached is my stack up for reference.
For LMH1297EVM, the board stackup requires us to use layer 3 for 75-ohm-reference impedance. In your case, your board stackup can use layer 2. This is not a problem. We've had other customer design using layer 2 as well. Please note, 75-ohm trace should be as short as possible in order to meet SMPTE rise/fall time and reduce parasitic which degrade return loss performance. Also, pcb layout for the BNC connector is very important. Please contact your BNC vendor to make sure the recommended layout is used.
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In reply to Nasser Mohammadi:
Thank you for your response.
Also could you please let me know if keep out area has to provided for BNC connector in layout.
In reply to Shifali N:
The BNC keep out area layout would be provided by your BNC connector vendor. Please discuss this with your BNC connector vendor.
If you use the same BNC connector as what we have on LMH1297 evaluation board, then you can refer to the LMH1297 evaluation board pcb layout.
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