DS90UH941AS-Q1: can not linked with ds90ub948

Hi Abraham,

The difference between UH and UB is the HDCP. If you want to use UH device, you must have the proper DCP license in order to use UH device. However, both UB and UH are the same device and same functional, but UH has additional register for HDCP.

Can you provide me your schematic? I would like to review it.

Aaron

Hi Aaron,

Thanks for your reply. here is the sch and pcb louyout pictures, Please help me check them. Thanks again. The resistors of IDX/MODE_SEL0/1 are modified.

Hi Abraham,

Thanks for sharing the schematic and layout. Let me review this, and I will get back with you by Friday.

Aaron

Hi Aaron,

Thanks for your help, you're right. The issuse is the clock, I use DSI clock with it, it can link now.

But there are a new issuse caused by dsi clock. Look at the pic as below, the ds941h pixel clock is 165MHz, it is too high, I use 1280*800/60fps, RGB888, It should be 75MHz.

I use Xilinx MIPI DSI IP in the fpga, there are no optional to modify the dsi clock. so I try to modify the ds90uh941's DSI reg like 0x3A, 0x3B for the M/N divider, but I can not modify it. The two regs always 0. the pixel clock are always 165Mhz, Pease help me solve it.

Thanks

Hi Abraham,

I am very happy that you were able to established the link and lock. Basically, if you are using the external clock from DSI for the 941AS device, the input clock source passes through directly to the device. All you have to do is to ensure that you need to set the 941AS to external clock mode.

Aaron

Hi Abraham

can you share how do you solve this issues? thank you