Part Number: TUSB9261
In the design under test the TUSB9261 is connected to a laptops USB Type-C port via the HD3SS3220 type-c multiplexer chip.
The design has been working flawlessly for the last few months. However testing the design with a new laptop has encountered a strange bug.
When the design is connected to an HP ProBook 450G8, the TUSB9261 is intermittently not detected as a boot device.
When the laptop is off the Type-C port still provides 5V power. This is pretty typical for laptop Type-C ports. When the TUSB9261 is plugged in to the powered down laptop it enters the USB2.0 SUSPEND state. This is what we would expect given that the USB controller of the laptop will be disabled. I have seen this in the debug port output of the TUSB9261.
Turning the laptop on generates a USB reset event, but the 5V rail remains high (the TUSB9261 is not power cycled). From this point on there the behavior of the TUSB9261 is inconsistent. The output of the TUSB9261 debug port is below.
In all cases we see "connected at superspeed" initially. But there are multiple reset events that occur in succession. I have observed these multiple reset events result in the final state being:
Do you know why this one laptop may fail to see the TUSB9261 at boot time? The multiple USB reset events in a row is particularly weird. I should also say that when the device is connected the device runs well, and we see no evidence of link errors, or retraining, to suggest that the signal integrity is poor.
TUSB9261 debug logs. Start of the log is when the laptop is switched on.
Device detected as boot device, and shows up in boot menu:
 USB Reset event occurred. -> ahci_reset_lun(0) Connected at SUPER speed. USB Reset event occurred. -> ahci_reset_lun(0) LTSSM state = (0x7) POLLING. LTSSM state = (0x7) POLLING. Connected at SUPER speed. USB Reset event occurred. -> ahci_reset_lun(0) Connected at SUPER speed. -> usb_hal_set_address() - addr: 0x1. -> handle_usb_set_configuration() - val = 1.
Device not detected by BIOS as boot device:
 USB Reset event occurred. -> ahci_reset_lun(0) Connected at SUPER speed. USB Reset event occurred. -> ahci_reset_lun(0) LTSSM state = (0x7) POLLING. HS/FS/LS state = (0x0) ON. HS/FS/LS state = (0x5) EARLY SUSPEND. HS/FS/LS state = (0x3) SUSPEND.
Thanks in advance for your help.
We have not seen this issue reported before with TUSB261. Would you be able to provide a USB packet trace when the issues is seen? Just to clarify at boot you multiple reset then one of the three states occur:
I agree that multiple resets are odd in this case. We should confirm if Host is sending the TS2 ordered sets as expected for Hot Reset or understand if there is a LFPS timeout that could send the USB 3 link to SS.Inactive then down to USB 2.0 Suspend. Not sure if this involves Warm Reset as I would expect to see link reenter RX.Detect when Warm reset is initiated.
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In reply to Malik Barton57:
Yes that is correct. I have attached 4 csv files that re the output from my USB protocol analyser. There are 2 cases which result in successful detection of the device, and 2 cases wheere the device is not connected (USB2 or USB3).Three captures are on the HP laptop which works intermittently, and one is one is on a Dell Laptop which always works. I hope these results shed some light on the issue.Thanks for your help,
In reply to Peter Bouvy:
I will review these files and get back to you by Wednesday afternoon. Is that okay?
Sorry for the delay had to dig a bit deeper on this one. It seems that we have a couple of situations going on revolving around the inability to complete link training successfully. I will give a detailed post tomorrow with some potential debug steps. Do you have the ability to capture some waveforms on the SS lines?
The fastest oscilloscope I have is 2GHz. Which is probably not fast enough to read and decode USB3 Superspeed packets. Does link training happen at the full 5Gbps speed? Or something slower?Any debug advice you can provide is greatly appreciated.
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