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TPS65987D: Port behavior during SPI flash update process

Prodigy 30 points

Replies: 5

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Part Number: TPS65987D

The document "TPS65987 and TPS65988 SPI Flash Firmware Update Over I2C" (SLVAE21A) states that:

"The flash update process can be initiated by the host when the device is fully functioning in the application firmware, and the port shall be disabled during the update process."

What does this entail? Is VBUS disconnected from the rest of the system at some point in the procedure?

In the instance where the device is dependent on VBUS to power up an EC that then programs TPS65987D's SPI flash memory with a custom configuration the first time the device powers up, will VBUS be lost at any point during the programming process?

Thank you,

Alexey

  • Hi Alexey,

    Is your system always powered by external VBUS like in dead battery case? What's your VIN3V3 connected to and is the flash power connected to LDO3V3?

    Regards,

    Peter

  • In reply to pdjuandi:

    Peter,

    Thanks for a prompt reply.

    The case is for first-time programming without any other power source connected - so yes, a Dead Battery condition. A DFP would be connected to VBUS, and TPS65987D's Dead Battery behavior would be configured to connect VBUS to the rest of the system. A downstream EC could boot and program the TPS65987D's SPI flash with first-time binary. SPI flash is powered via LDO3V3, and VIN3V3 is not powered at this time.

    The concern is that if TPS65987D will disconnect Rpd at any point during the update process (as that document 's example code suggests), the DFP would disconnect VBUS and the system would lose power. Is that the case? And if so, at which point does the device float the CC line? What would be a workaround, besides connecting an extra power source downstream of TPS65987D to hold the system alive?

  • In reply to Alexey Revinski:

    Hi Alexey,

    I think this statement from the apps. note is for safe guarding to ensure no activity during flashing process.

    Since in your system the host power is from external source through VBUS, try to comment out the lines that disable the port and check.

    Regards,

    Peter

  • In reply to pdjuandi:

    Peter,

    I don't have access to an EVK at the moment.

    To make sure I understand correctly - this is definitely not an automatic hardware behavior, but rather a software-controlled step, correct?

    Alex

  • In reply to Alexey Revinski:

    Hi Alex,

    Yes, that's correct.

    Regards,

    Peter