DS90UB936-Q1: DS90UB936-Q1 and DS90UB953 CMS camera Debug

Is 2G mode means Synchronous Mode as descipt below?

Semiyd,

I can't see your provided picture/screen shot! Can you please re-post?

I use the following seq (verify ok in 954 and 953 camera moudle with 8 bit YUV format)

#define SER_ID (0x1A)
#define SER_ALIAS_ID (0x1A)
#define SlAVEID_0 (0x1A)
#define SLAVEALIAS_0 (0x1A)

step 1: initial 954
{0x02, 0x3e},
{0x0c, 0x96}, // port 1 receiver pass, port 1 receiver lock, enable port 1 receiver, disable port 0 receiver

{0x4c, 0x12}, // select port 1 register, port 1 writes enabled, port 0 writes disabled
{0x20, 0x10}, // forwarding enabled for port 1, disabled for port 0
{0x1f, 0x02}, // transmitter speed select 800Mbps serial rate

{0x33, 0x21}, // 4 lanes, disabled continuous clock mode, enabled csi output

// RX port specific register. The FPD-Link III Port Select register 0x4C configures which unique RX port registers
// can be accessed by I2C read and write commands.
{0x5b, SER_ID}, // SER_ID (Address 0x5B)
{0x5c, SER_ALIAS_ID}, // SER_ALIAS_ID (Address 0x5C)
{0x5d, SlAVEID_0}, // SlaveID[0] (Address 0x5D)
{0x65, SLAVEALIAS_0}, // SlaveAlias[0] (Address 0x65)

{0x58, 0xbe}, // iic pass through all transactions enabled, disable iic auto ack, back channel disable, enable back channel CRC, 50Mbps back channel frequency

{0xffff, 0x0a}, // this means delay 10ms

{0x1A, 0x07},
{0x18, 0x43},
{0x6F, 0x8A},

step 2: initial 953 camera module

{0xFFFF, 0xFF}, // this means delay 255 ms
{0x0E, 0xF0},
{0x0D, 0x40},
{0x06, 0x43},
{0x07, 0x6F},
{0xFFFF, 0xFF}, // this means delay 255 ms

{0x0B, 0x13},
{0x0C, 0x26},
{0x02, 0x13}, // 4 lane continous clk

{0x0D, 0x41},
{0xffff, 0xa0}, // this means delay 10 ms

step 3: read CMS_DS90UB936_DEVICE_STATUS(0x04) register, I got the 0xd3 val which means LOCK and PASS failed?
#define CMS_DS90UB936_DEVICE_STATUS (0x04)

basic info of my board 936
1. the 936 work on Mode No 4 (pin is 0.559 × V(VDD18), CSI-2 synchronous back channel)
2. the 953 of camera module works on Mode No 3 (CSI-2 Non-synchronous – FPD-Link III Clock reference)

I have the following question，
question 1 : can I use 954 and 953 camera seq(as above) for 936 and 953 camera directly? if not, could you provide me the verified seq of 936 and 953 camera module?
question 2 : from the CMS_DS90UB936_DEVICE_STATUS register val , the link between 936 and 953 is failed, what can I do next?(I use the same 953 camera with 962 is work ok)
question 3 : "The 936 is compatible with the 953 only if you put the 953 in 2G mode, not 4G mode." , I don't quite understand the meaning of that sentence, could you give me the answer of the 936 Mode No and 953 Mode No which can make serDes works well, thanks very much

step 1: initial 954 means   initial 936 with 954 seq, it runs on 936 infact