As the title requests, what is the maximum input rise/fall time for the TXD input? I would expect this differs between the "V" and "not-V" variants, given the TTL vs CMOS logic levels.
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As the title requests, what is the maximum input rise/fall time for the TXD input? I would expect this differs between the "V" and "not-V" variants, given the TTL vs CMOS logic levels.