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TFP410-EP: VREF Clarification

Part Number: TFP410-EP
Other Parts Discussed in Thread: TFP410

We have had two DVI chips (the TFP410) that have not worked. One was on initial power up and another was after testing for a while. I suspect it is the setting we have on VREF but the datasheet is not clear enough. The datasheet says "For low-swing input signal levels, VREF should be set to half of the maximum input voltage level. See
Recommended Operating Conditions for the allowable range for VREF." We then set it to 0.9V since our signals coming from the FPGA have a signal voltage of 1.8V. But when you look at the recommended operating conditions it says the 0.9V is the max. I am wondering if setting it at the max might make some parts fail because of tolerances.

What happens when the voltage is above 0.9V?
It is not clear would switch over to "High-swing mode"

I am not asking if this can damage the part, I am wondering if the part was not working because it was not in low-swing mode.. What I am wondering is if the VREF is set to 0.92V, is it absolutely sure that the part will be in low swing mode? How about 1V? How about 2V? How about 2.5V, 2.9V, etc...

  • Hi Patrick,

    Vref for low-swing mode will be fine for 0.55V to 0.95V. For high-swing mode it must be tied to 3.3V. Anything in between is undefined.

    Can you describe what failure you are seeing? Is there no image on the display? Have you checked the input/output signals?

    Regards,

    I.K.