Other Parts Discussed in Thread: USB-2-MDIO
FAQ – DP83822 Link-up Issues
“My device is failing to link; what can I do?”
The following is a short list of possible issues the team has seen that prevent a PHY from linking. The DP83822 was used as the example part for these issues. If you are experiencing issues linking your device, check out the following list.
1. Un-stabilized crystal / crystal not oscillating within device tolerance – Measure the oscillating crystal’s output and verify that the frequency is within the device tolerance listed on the datasheet. The frequency should be measured during power up sequence to verify how long the crystal needs in order to reach a stabilized frequency. Using low capacitance scope probes will prevent an unwanted effect on the crystal loading.
For the DP83822, look at Tables 142, 143 and 144 for oscillator and crystal tolerances in the datasheet (https://www.ti.com/lit/ds/symlink/dp83822i.pdf). If the oscillator or crystal used does not meet one of these specs, the oscillator or crystal should be replaced. Either the model or the individual part can fail to meet spec.
2. Incorrect bootstrap settings - Compare the desired link interface mode with the recommended bootstrap settings in the device datasheet. The strap settings are only latched upon a power up and hard reset or hard software reset. The strap settings can be read in their corresponding registers after booting the device. To change the register settings that were programmed by the bootstraps while the device is running, the user must program the registers using Serial Management Interface (SMI). Software tools like USB-2-MDIO can be used to access registers on the PHY. Follow this link for the USB-2-MDIO download: https://www.ti.com/tool/USB-2-MDIO
Reference Table 83 and 84, the strap latch register (SOR) descriptions, in the DP83822 datasheet to cross reference the expected strapping with the latched strapping. Section 8.5.1 describes the Hardware Bootstrap Configurations with more details in Tables 9 through 14. https://www.ti.com/lit/ds/symlink/dp83822i.pdf
3. Skipping/incorrect initialization script – In order to establish a link either an auto-negotiation script or a force Primary/Secondary configuration script must be run via the SMI interface with a tool like USB-2-MDIO. The following E2E thread discusses this: https://e2e.ti.com/support/interface/f/138/t/941643. Each system application may need to modify some of the settings in these linked scripts. Always compare the programmed settings to the datasheet recommended settings as the first debugging step.
Access the Linux drivers for the TI Ethernet product line here: https://www.ti.com/tool/ETHERNET-SW
4. Device needs software reset – Some system conditions can cause the link to drop during start up. If unusual behavior is happening after an initial link is established, a software reset can solve the issue. There are two types of software resets: Hard software reset (reg<0x0016>=x8000 in the DP83822) and soft software reset (reg<0x0016>=x4000 in the DP83822). The soft software reset will not delete the loaded PHY register configuration. It will only restart the internal state machine. The hard software reset followed by loading the initialization configuration (if any) again is the second type of reset to try. The last reset option is a pin reset followed by initialization configuration. See the following forum for more information: https://e2e.ti.com/support/interface/f/138/t/962346. This thread also address the issue: https://e2e.ti.com/support/interface/f/138/t/944470
5. Poor connector or cable – A connector or cable may be the cause of a failed link. To rule out this potential hardware bug, try a different or shorter cable. Also, make sure that the partner devices, as well as the DP83822, can transmit with the cable’s specs.
6. Transformer not connected as described in the datasheet– If the failure continues after verifying the correct software settings, there is likely a hardware error. A documented case on the Xilinx forum recognized a missed transformer to 3.3V analog rail connection. If basic connectivity is failing, double check the datasheet and EVM manual to verify that all the necessary hardware values and connections are present. See the forum for more information on this issue: https://forums.xilinx.com/t5/Ethernet/ZynqMP-PS-GEM-TI-DP83822H-PHY-not-working-on-petalinux/td-p/1104415
Below is a description and figure from the DP83822 datasheet describing this connection.
Other hardware issues may arise when the PCB does not meet all the PHY requirements. The following thread discusses an example where the LED_0 wiring was causing a bootstrap conflict: https://e2e.ti.com/support/interface/f/138/t/917785
7. Enable “robust” auto-MDIX feature – The forum linked in #6 discusses another bug where the PHY is not always detectable by the partner device. Enabling the robust auto-MDIX feature helps improve detection. The following E2E thread also discusses the robust auto-MDIX feature’s use for partnering with a “less robust” device: https://e2e.ti.com/support/interface/f/138/t/815113
8. Incorrect bootstrap hardware – In some cases, the bootstrap design on a custom PCB may not be reading correctly or the startup software may be overriding the strapped condition. Register 0x0 is a R/W register and allows the user to overwrite the mode after start up. This thread discusses a similar case: https://e2e.ti.com/support/interface/f/138/t/875800?DP83822H-Phy-link-down-and-speed-is-stuck-at-10mbps
9. USB-2-MDIO Set-up Errors – When programming a TI PHY with USB-2-MDIO serial interface, the correct PHY address must be used. The GUI will be unable to connect and should notify the user before a link is tried. Using proper procedure for extended register writes is necessary as well. Not properly adjusting the extended registers can make some systems fail to link. See the register read and write procedures in the USB-2-MDIO user’s guide here: https://www.ti.com/lit/ug/snlu197/snlu197.pdf