DP83822HF: Issue with DP83822 IBIS MODEL

Hello Sreenivasa,

Thanks for your input.

To give you more clarity on what I am doing- I am performing Signal Integrity Prelayout Analysis using dp83822.ibs model as a driver. I am measuring voltage at the output of this ibis model by terminating it with high impedance. I am observing ringing in the falling edge of the voltage waveform.

I am facing issues while attaching the required files here. Can you please help.

Thanks 

Hello Sreenivasa,

Thanks for your input.

To give you more clarity on what I am doing- I am performing Signal Integrity Prelayout Analysis using dp83822.ibs model as a driver. I am measuring voltage at the output of this ibis model by terminating it with high impedance. I am observing ringing in the falling edge of the voltage waveform.

I am facing issues while attaching the required files here. Can you please help.

Thanks 

Hello Pali Barmate, 

Please use insert

image/video/file 

to upload the plots or files.

Regards,

Sreenivasa 

Hello Sreenivasa,

Thanks! That upload option was not enabled at my end earlier, but now it is working fine.

Please find the image below:

Hello Pali Barmate, 

Thanks for the waveform.

Can you please provide more details on the IO that you  used when you are seeing these ringing.

Can you please check on some of the MII or RMII  data output ports.

Regards,

Sreenivasa 

Hello Sreenivasa,

Please find the IO details below:
1.Buffer :output1p8

2.Voltage:typical

3.Source:PRBS

4.Frequency:50MHz

Regards,

Pali Barmate

Hello Pali Barmate

Thank you for the inputs. 

I would assume you have the DP83822 schematics done for analysis.

There are different group of signals, some of the signals are static and some are dynamic.

Are you doing the simulation on the static or dynamic signals.

Can you mark the signal that you have simulated.

Can you try doing the same analysis  on some of the MII or RMII signals depending on the configuration.

Regards,

Sreenivaa

Hello Sreenivasa,

I am doing the simulation for following signals
Rx_D0, Rx_D1, Rx_D2 & Rx_CLK as shown below in the snap captured from the DP83822 datasheet:

Regards,

Pali Barmate

Hello Sreenivasa,

We are using RGMII configuration. 
We have tested all data & Clock pins through the same process and observed the same ringing issue at the transmitted waveform.

We have also checked with 25MHZ, but the ringing problem is there.

Regarding loop back thing you have mentioned in your response, can you please elaborate it more?  

Hello  Pali Barmate

Thanks for the mail.

Is the 10K that you have shown in the above picture the high impedance you are talking?

Can you externally loop back the RX signals to TX signals and check if you see similar behavior. 

I am not sure on the effect of 10K static impedance on the signal output you are using to test as against MCU or memory input and hence validating the same.

Regards,

Sreenivasa

Hello Sreenivasa

Yes, 10k is connected to have high impedance.

As shown below , connected the output buffer model of DP83822 with the input buffer model of same IBIS model. Observing the same ringing issue at transmitter as well as receiver end.

Regards,

Pali Barmate

Hello Pali Barmate

Thanks for checking, Did you try this on multiple signals. Can you send me the configuration - frequency, duty cycle etc

The duty cycle for testing should be 40-60%.

Regards,

Sreenivasa 

Configuration details are following:

Frequency=50MHz
Duty Cycle=50%

Regards,

Pali Barmate

Hello Pali Barmate

Thanks for the inputs..

From the below snap shot, please provide details of IO configuration that you have made. Which tool are you using.

Regards,

Sreenivasa

Hello Sreenivasa,

I believe there is an issue with the IBIS buffer model 'OUTPUT'  falling edge data. Because of this transmitted waveform is not clean and same is reflected in receiving waveform. Can you please confirm the same.

Regards,

Pali Barmate

Hello Pali Barmate

Thank you for the inputs. We will do the check on our side.

How about the power supply, i would assume you selected 1.8V. Did you also check with 3.3V?

Which input did you loop back the output to?

Regards,

Sreenivasa 

Hello Sreenivasa,

Thanks.

I peformed the simulation for 1.8v only which is required.

I loop back TX_D0 pin to the output of RX_D0.

Regards,

Pali Barmate

Hello Pali Barmate

Thank you for the inputs and noted.

I expect to come back to you by next week.

Regards,

Sreenivasa

Hello Sreenivasa,

Thanks for your reply.

I may not be able to check the model in an alternative tool as you suggested considering the project timelines at my end.

But to ignore this ringing issue as mentioned earlier, I tuned some of the voltage points for the falling waveform of buffer model 'OUTPUT 1P8' as shown in the below image-

With actual buffer model- 

    

With tuned buffer model-

Let me know if this is the right approach to follow.

Regards,

Pali Barmate

Hello Sreenivasa,

We have tuned few voltage levels at the peak of falling waveform as shown in the below image

Actual IBIS model-                                                                  With tuned IBIS model

Regards,

Pali Barmate

dp83822_v2.ibs

PFA.

Regards,

Pali Barmate

Hello Sreenivasa,

Did you get a chance to look into this tuned IBIS model?

Regards,

Pali Barmate

Hello Sreenivasa,

Thanks for your reply.

Just to confirm if we can go ahead with the tuned model for our simulation?

Regards,

Pali Barmate