SN65DP141: D3 detection & Pull low PWD# to reduce power consumption

Hi Team,

My customer would like to know whether SN65DP141RLJR support D3 detection and go to D3 standby mode automatically? (also auto wake up from D3)

Or you would suggest us to let other chip do this detection job, and just provide the PWD# signal to DP141?

Please kindly share your comment since customer need feature of very low power consumption in his system design.

And if customer use at the DP1.4 HBR3 mode,

1. What is the trace limit / width limit ?

2. Placement should close scaler or I/O connector ?

Thanks!

Kai