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TLK10034: produce a CRPAT and CJPAT patterns

David Sandler
Intellectual 1910 points
Part Number: TLK10034

Hi,

  I am utilizing the TLK10034 in a design where I am using the LS side to test 16 XAUI channels. I need to produce a CRPAT and CJPAT patterns  but the TLK10034 DS and app report SLLA351 give differing information. According to the DS, register 1E 0x000B, bits 11 and 5:4, Table 5-41, setting of 100 is N/A. The application report stated in Table 1 that 100 is a CRPAT short.

 

Which is correct?

 

If the DS is correct and I am supposed to use register 01 0x8002 in Table 5-100, what register do I use to check the error count for each lane?

 

Also, where can I find the "Test Procedures" repeatedly referred to within the DS? 

Thanks,

David

  • 0
    TI__Genius 10250 points
    Hello,
    Answered via email. repeating here for general benefit... If the customer wants to test KR Mode XAUI CRPAT/CJPAT on LS side (4 channels), they can use bits 1.8002[3:2] to enable pattern generation (page 94), 1.8003[11:10] to enable pattern verification (page 95) and 1.8019/1.801A for error counter (page 97).
    Regards,
    Yaser
  • 0 in reply to Yaser Ibrahim

    Where is the LN0-LN3 designation in the error counters from pg 97 (1.32793 and 1.32794)? I see 32 bits between them but all other LN error counts are 16 bits.

  • 0 in reply to tim gough
    TI__Genius 10250 points
    Hello,

    Yes; error counter for CR/CJ test pattern is 32 bit. This is on KR transmit side (high-speed side - it is one lane). Please let me know if I misunderstood your question.

    Regards,
    Yaser
  • 0 in reply to Yaser Ibrahim

    Thank you but how do I distinguish between the low speed lanes L0-L3? All other error counters have separate registers for each lane.

  • 0 in reply to tim gough
    TI__Genius 10250 points
    Hello Tim,

    There isn't individual lane error counters for the CR/CJ test pattern because this pattern is packet-based and the bits from the 4 lanes are combined into packets. If you want to check individual lanes, then you can use one of the other test patterns.

    Regards,
    Yaser
  • 0 in reply to Yaser Ibrahim
    Hello Yaser,
    Being packet based, I presume that there is either a maximum skew between the lanes or an alignment of the data within the TLK10034. Do you know which it is?
    Also, is there any truth to the Table 1 within the app report SLLA351 that the 0x1E register address 0x000B, bits 10:8 can be set to 011 or 100 to generate a CRPAT on single lanes?

    Thank you
  • 0 in reply to tim gough
    TI__Genius 10250 points
    Hello Tim,

    There is a spec on “Intra-pair input skew” for LS side (see 4.9). There is also lane alignment as mentioned in section 5.1 & 5.3.1.1.

    What do you mean by generate CRPAT on single lanes? Bits [10:8] are for HS side.

    Regards,
    Yaser
  • 0 in reply to Yaser Ibrahim

    Hello Yaser,

      In my application, the TLK10034 LS lanes are being used to test 16 3.126Gbps XAUI SerDes lanes on the ATE. The HS lanes are not utilized.  My intention is to generate/detect a CRPAT on each LS lane. I was using the application report, SLLA351 and TLK10034 Bring Up Procedures Application Reports to guide my design. In each, a method generation to a LS CRPAT involves writing 3'b011 to {30.11.11, 30.11.5:4} for a CRPAT long or 3'b100 for a CRPAT short.

     My application cannot accommodate any skew requirement between lanes.

    When I scope the outputs with the settings described above, it is a 1010... pattern.

  • 0 in reply to tim gough
    TI__Genius 10250 points
    Hi Tim,

    Pattern 1010... means that it is set to high freq pattern (setting 000). Can you please read register 30.11, 30.12, and 30.15 after setting everything as needed and send me what you get? Thanks.

    Regards,
    Yaser
  • 0 in reply to Yaser Ibrahim

    Hi Yaser,

    30.11 = 0x0F30

    30.12 = 0x03F0

    30.15 = 0x2000   I have mixed results with the LS_PLL_LOCK bit.

    Thanks,

       Tim

  • 0 in reply to tim gough
    P.S. My previous response was when I have the device configured to generate the CRPAT using the KR_VS_TP_GEN_CONTROL. I gathered from your previous responses that this mode would be inappropriate in my application since the four lanes need to meet a minimum skew parameter.

    In the mode where I am attempting to generate a CRPAT_LONG using the register 30.11 the read back is 0x07F0.
  • 0 in reply to tim gough
    TI__Genius 10250 points
    Hi Tim,

    Can you please send me your complete procedure: what you write to which registers?
    If you want to test KX mode CRPAT long/short on LS side (4 channels x 4 lanes), you should use bits 30.11[7:4] (page 117) to enable pattern generation/verification, 30.15[14] (page 118) to check test pattern alignment status and register 30.17 (page 118) for error counter. Select each lane status through bits 30.12[13:12] (page 117).

    Regards,
    Yaser
  • 0 in reply to Yaser Ibrahim

    Hi Yaser,

    Here is what I have. All is in hex:

    1E.0000  0820,  1E.0001 4B80, 1E.0002   810D,  1E.0003 8040, 1E.0006 F115, 1E.0007 AC04, 1E.000A 5100, 1E.000B 07F0

    With the above I hoped to be generating CRPAT data from all LS lanes.

    Thanks,

        Tim

  • 0 in reply to tim gough
    TI__Genius 10250 points
    Hi Tim,

    Since the device needs to be in KR mode to generate XAUI patterns on LS side, the test pattern registers to generate those patterns are the KR registers (KR_VS_TP_GEN_CONTROL, KR_VS_TP_VER_CONTROL ). Sorry about the confusion.

    In the TLK10034 Bringup Procedure Document, there a section titled: “KR with Auto Negotiation, Link Training, LS Test Patterns with 156.25 MHz / 312.5 MHz Refclk” which is what you need to follow, including the below sequence:
    Enable KR LS test pattern generation
    231 – 1 PRBS / 223 – 1 PRBS / 27 – 1 PRBS – Write 1’b1 to 30.11.7
    High / Mixed / Low Frequency – Write 1’b1 to 1.32770.0
    CRPAT – Write 1’b1 to 1.32770.3
    CJPAT – Write 1’b1 to 1.32770.2
    Enable KR LS test pattern verification
    231 – 1 PRBS / 223 – 1 PRBS / 27 – 1 PRBS – Write 1’b1 to 30.11.6
    High / Mixed / Low Frequency – Write 1’b1 to 1.32771.8
    CRPAT – Write 1’b1 to 1.32771.11
    CJPAT – Write 1’b1 to 1.32771.10

    Regards,
    Yaser