This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

PC16550D: Examples of configuring a 16550 UART with a Z80 CPU.

Part Number: PC16550D

I'm looking for examples of configuring the 16550 UART/ACE with an older Z80 CPU. Any examples of the topics below would be appreciated.

1) Basic comm without interrupts and flow control

2) FIFO based comm

3) FIFO based comm with interrupts and flow control

  • Hey Don,

    I will try to get back to you on this early next week. (Monday/Tuesday).

    Thanks,

    -Bobby

  • Any luck, Bobby?
  • Hey Don,

    Sorry for the delay.

    "1) Basic comm without interrupts and flow control"

    I assume you are asking about communication WITHOUT the FIFO. FCR0 in this case will be set to 0 to disable the FIFOs.

    You will need to look at the TXRDY and RXRDY pins to determine if the transmitter buffer is filled or if the Receiver buffer is filled. RXRDY will be 0 if there is a character in the receiver buffer and if TXRDY is low then the transmitter buffer is empty.

    "2) FIFO based comm"

    This actually looks like it is covered in section 8.4.2 of the datasheet. The Polled Mode is a mode where you do not need to look at the interrupt pin and instead focus on reading the LSR (line status Register)

    Bits 0, 1, 2, and 3 of IER should be set to 0 and FCR should be set to 1 to use Polled Mode.

    If LSR0 is 1 then you can read data from RBR (receiver buffer register)

    If LSR6 is 0 then you can send data to THR (transmitter Hold Register)

    "3) FIFO based comm with interrupts and flow control"

    Section 8.4.1 looks like it discusses this. You may also want to monitore MSR (modem status register) to look at the bit 0, 1 , and 3 to watch for changes in CTS, DSR, and CD.

    -Bobby