TMS320F28375S: GPAINV, GPALOCK, GPACR, and INPUTSELECTLOCK registers

Hideaki-san,

[1] GPAINV register:

What is the functionality only the register can provide ?
Or, what is the intended usage of the register ?

This is to invert the GPIO input. This is only to provide flexibility to change the polarity of input if needed (instead putting that inverter on board).

[2] GPALOCK register - - unlocking:

Is it possible to unlock by simply clearing the bits ?

Yes, it can be unlock by clearing the bit only if respective bit in commit register (GPACR) is not set.

[3] GPACR register - - unlocking:

I think the bits are not cleared by a register write. Is it correct ?
If yes, how to clear the bits ? What kinds of resets will clear ?

Yes, bits in this registers can be set to '1' but can not be clear. These bits will be cleared by SYSRSn which means all the reset except HWBIST reset which resets only CPU.

[4] INPUTSELECTLOCK register - - 'R/SOnce'

What is the word 'R/SOnce' means ?  We see that on the TRM p962.
What is different from the word 'R/WOnce' for the GPACR register ?

R/SOnce means it can be set to '1' and writing '0' has not impact. Meaning one can write '0' multiple time and then set to '1'. R/WOnce means it can be written once (either '1' or '0'). Meaning if you write '0' to this bit then after that it can not be changed to '1'. Since there is no commit register for INPUTSELECTLOCK, it has been implemented as R/SOnce so that user can LOCK individual bits.

Hope this helps. Let me know if there is any further queries.

Regards,

Vivek Singh