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ISO7842: expectable failure effects

Part Number: ISO7842

Dear TI-team,

 we are currently developing a system that needs to isolate 1500V DC from PELV circuits. 1500V DC are required for the intended use, while from the PELV circuits power and signals are routed.

Now, the ISO7842 ensures isolation between PELV and 1500V DC working voltage. Chapter 6.8 "Safety Limiting Values" describes requirements to ensure for safe operation. However, to assess failure mechanisms of our product I would like to know, 

  • what happens, if instead of a supply voltage of 3.3V in case of failure 48V are applied,
    • (I assume the safety limiting values will be exceeded, but what is next)
  • and what failure effects are to be expected.

We need to ensure a safe product in single-failure scenarios. If one part of ISO7842 is fried, will the other part still be isolating as it is rated for reinforced isolation?

Best regards,

Ralf

  • Hi Ralf,

    Thank you for posting, and welcome to E2E!

    ISO7842 can withstand 1500Vrms stresses across its isolation barrier for its entire lifetime without damage or reduction to its long-term reliability if the recommended operating conditions of the device are met. If there is an electrical overstress (EOS) condition on Vcc pins with respect to the local GND, like if the 3.3V supply increases to 48V, internal circuitry to the local power supply can be damaged, and the device can heat up beyond its absolute maximum rating (150C).

    This is usually not an issue if the EOS is removed immediately, but if the over-stress condition is not removed, the isolation capacitor that does not have any EOS could also be damaged due to the excessive heat coupling within the device, causing the other isolation capacitor to exceed its absolute maximum temperature ratings. This is described by "Failure Mode 2" in the Understanding failure modes in isolators (SLYY081A) white paper.

    It is important to make sure the EOS stress is not continuous or if it is continuous, to ensure the current into or out of the device is limited according to the "Safety Limiting Values" specifications shown below. Such current limits help prevent the device temperature from exceeding the maximum rated temperature on both sides of the isolation barrier during EOS conditions.



    Using current-limiting resistors on the power supply pins of isolators can prevent the isolator from exceeding its safety limiting current values during EOS conditions, and for the 48V case a resistor of ~100Ω should suffice, however this would create a voltage drop between the input power supply and the isolator pins. If this Vcc drop results in signals exceeding the Vcc+0.5V maximum spec, the resistor should be reduced.

    Additional information on safety limiting values can be found in this Understand and apply safety-limiting values for digital isolators article and in the E2E post linked below:



    Please let us know if you have any additional questions.


    Best,
    Manuel Chavez

  • Hi Manuel,

    thanks for the explanation and the references especially to the white paper. I understand exceeding the "Safety Limiting Values" actually does not limit safety (rather function) since basic isolation is maintained even after a (single) high power event on either side. Please correct me, if I am mistaken!

    Further I understand, the ISO 7842 is fully covered by the whitepaper.

    Best regards,
    Ralf

  • Hi Ralf,

    You're welcome! Your understanding is correct.

    To summarize: basic isolation is maintained even after a single, local high power event on either side. If this single event has a long duration and causes the isolator to heat up above the maximum temperature ratings, the remaining isolation protection can be damaged as well. To prevent excessive heat from one side of the isolator causing damage to both isolation capacitors, current and power dissipated by the device should not exceed the Safety Limiting Values in its datasheet.

    Please feel free to post a reply or create a new thread using the red and yellow buttons in the upper right corner of this window if there are any additional questions.


    Thank you,
    Manuel Chavez