If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

# SN6501-Q1: SN6501-Q1 vs. SN6505-Q1

Part Number: SN6501-Q1
Other Parts Discussed in Thread: SN6501

Dear Experts,

in SN6501-Q1 datasheet, section "Absolute maximum ratings" I found the maximum cont. power dissipation of 250mW. I'm wondering about this number because with a loss of 300mW junction temp. rise should not be more than 12K (0.3W * 40.4K/W).

In SN6505-Q1 dataheet this value is not given.

Can you explain why this value is specified for the SN6501-Q1 and not for the SN6505-Q1 please?

Thanks,

Martin

• Hi Martin,

Welcome to TI E2E forum!
Thanks for your interest in SN650x devices and for reaching out.

I see that you have used junction-to-board thermal resistance for calculating the max junction temperature rise. To estimate the max temperature rise allowed and thereby find out the max power dissipation, it is best to use the junction-to-ambient thermal resistance as we know the device's max ambient temperature rating and max junction temperature rating.

For SN6501,
Max temperature rise allowed, Tr(max) = Tj(max) - Ta(max) = 170C - 125C = 45C
Thus, max power dissipation allowed, Pd(max) = Tr(max) / ThjA = 45C / 208.3C/W = 216mW

Since there are margins on Tj(max), the Pd(max) spec in datasheet has been specified as 250mW instead of 216mW.

For SN6505,
Following similar calculations, Pd(max) = 181mW.

Sorry that Pd(max) is not specified in the SN6505 datasheet. I hope that your questions are answered. Let us know if you have any further questions. If you have questions on new topics or other devices, please create a new post with a new title so that other community members also can find answers by searching. Thanks.

Regards,
Koteshwar Rao

• Hi Koteshwar,

thanks for the quick response. Yes I calculated with the Rth junction to board because our board is chilled to max. 85°C.
The substrate is about 56um (max 76um). Below this substrate a copper coin is cooled with liquid cooling. So the copper coin will not rise higher than 85°C causes by forced cooling. The cooling power is about 100W. GND plane from SN6501 is connected by thermal vias to the copper coin below. This is the reason why I calculated with Rth junction to board.

So I still do not understand this power dissipation limit when cooling is provided.

Regards,

Martin

• Hi Martin,

Thanks for sharing further inputs and clarification.

The max limit specified in the datasheet is according to our characterization and test conditions. We do not use any cooling mechanism and device is tested upto 125C ambient. If you have max temperature limit that is less than the device max limit and/or have additional cooling mechanisms, then you can dissipate more power into device. The key point is that the device junction temperature shouldn't be exceeded. You can use the same calculations that I have used in my previous post to estimate the max power dissipation allowed under your test conditions.

Let me know if you have any further questions, thanks.

Regards,
Koteshwar Rao