Other Parts Discussed in Thread: ISOW7742
Hello
I am trying to figure out in which situations which of my output signals will be in an undetermined state as described in the datasheet in chapter 9.4. There it is state underneath Table 9-3. that:
(3) The outputs are in an undetermined state when VCC < 2.1 V. Are my assumptions as in the drawing bellow correct (assuming that OUTA/B are on the VISO side and OUTC/D are on the VCC side)?