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ISO7762: If the electrical parameters exceeds the limit, What is the status of isolation

Hemanth Kumar Gundlapalli
Prodigy 20 points
Part Number: ISO7762

If supply of the isolator pins (VCC1/VCC2) are exceeds the max limit(for example VCC1/VCC2 >15V),

what is the effect on isolation and I/O pins.

Thank you in advance,

Regards,

Hemanth kumar G

  • 0
    TI__Genius 14090 points

    Hello Hemanth,

    Thank you for your question. The 6V supply voltage is the absolute maximum that the ISO7762 can tolerate. Exceeding the max voltage will damage the device resulting in unexpected and unreliable behavior. Please use a supply voltage between 2.25V and 5.5V to ensure the ISO7762 behaves as expected and no damage occurs to the device or isolation barrier.

    Regards,

    Darrah

  • 0
    Prodigy 20 points

    Hello Darrah,

    I am using 5v supply voltage, my query was if the 5V net is shorted with higher voltage(>15V) for shorter duration.

    1. What is the exact behavior of the IC?
    2. Can I expect isolation after IC getting damaged?
    3. Whether I/O signals enter into default mode?

    Thank you in advance,

    Regards

    Hemanth kumar G

  • 0 in reply to Hemanth Kumar Gundlapalli
    TI__Genius 14090 points

    Hello Hemanth,

    I see, you are curious how the device will respond to an unplanned temporary spike in voltage. If a high voltage (>15V) is applied to a VCC pin due to a short, there is a chance the device will take some damage. It is not possible to predict the exact way the device will fail since there are many variables that can impact the device response. I'm attaching a link to an app note below that details the different failure modes as well as the behaviors of each mode and design considerations. The device will enter the default mode when VCC1 is unpowered or there is no input being transmitted. This means, in the event that VCC1 is damaged but VCC2 is still functional (see failure mode 2 in attached app note), the side2 outputs will go into the default mode.

    Understanding Failure Modes in Isolators

    Regards,

    Darrah