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ISOW1412: Common mode noise

Shotaro Sakai
Intellectual 2880 points
Part Number: ISOW1412

Hello team,

My customer has some questions on common mode noise. Can you give me your support?

  1. Is the correct as return loop of common mode noise? 
    • Primary side switching → Secondary side Visoout (12pin) → parasitic capacitance on board → Primary side GND1(10pin) 
    • If the above is right, why are ferrite beads recommended for VIN (1 pin), VDD (9 pin), and GND2 (11 pin)?
  2. Why do we need ferrite beads on both the primary and secondary sides? Is either side OK?
  3. A small return loop would form with ferrite beads. Is this correct in understanding that smaller return loops result in lower emissions?

Best regards,

Shotaro

  • 0
    TI__Guru 54155 points

    Hi Shotaro-san,

    Thank you for reaching out. Please see my inputs below, thanks.

    1. See inputs below,
      1. The common-mode current loop will be formed from any pin on left side to any pin on the right side.
        1. The loop path will be as: left side pin → through internal paths in device → right side pin → any or all parasitic paths to the left side (either through air or board parasitic capacitance).
        2. There will be many common-mode current loops formed wherever there are switching currents.
        3. Most commonly the power supply pins will have the higher current switching while data pins have very minimal switching currents. For this reason, it is okay to ignore the current loops through data channels and focus on power supply pins only.
        4. Since there is DC/DC converter connected to VDD and VISOOUT pins, these will have the most switching currents.
        5. VIO and VISOIN has internal digital circuit that needs transients currents and that current although going to be relatively small, it still can contribute to emissions. These currents show up on VIO and VISOIN pins as both common-mode and differential current loops.
      2. For the above reason, it is best to filter out all supply pins including VIO.
    2. The current loops are formed through all paths in PCB reaching all the edges of PCB. The FBs are inserted in the paths of current loops and block all loops going further out. Only a few short current loops will remain that are formed from pins before the FB (as shown in image below, CMC is used in place of FB, both achieve the same function here). The FBs basically break the paths and block forming larger current loops.
    3. Yes, your understanding is correct and is explained in the above point.

    Let me know if you have any other question, thanks.


    Regards,
    Koteshwar Rao