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ISO7741DBQEVM: Digital Isolator (ISO7741 and ISO7421) Layout

Part Number: ISO7741DBQEVM

Tool/software:

Hello,

I am using ISO7741DBQR and ISO7421MDREP in one of our designs. This is a very dense, 20 layer circuit card. The datasheet indicates we need to leave all copper layers below the IC free of copper. This is going to eat up a lot of copper area and I am afraid it may not be possible to use the isolators in the design if we did this.

The only reason we isolate signals is to prevent a current carrying reference between two circuit cards, and there's really no requirement on the isolation voltage (grounds on both sides are connected via a common mode choke, so there's no potential difference except some noise between them). There are communication signals, operating at 500Kbps. 

Question is, can I have the chassis ground plane (or any other plane you suggest, even a floating plane) below the Digital Isolator and use the remaining layers below for other power/routing (we can avoid vias in this area). I appreciate any help you could offer.

Thank you,

Tharaka.

  • Traces/planes below the chip reduce the creepage distance, but you do not care about that. And 0.5 Mbps is quite slow, so if you have slow edges, then you will not have large EMI problems.

  • Hi Tharaka,

    Thanks for reaching out!

    As Clemens and you have mentioned, since the isolation barrier and is not of concern and the data rate is small, it is ok to run traces under the isolator if needed. One point to consider is not to run High Voltage traces which can affect the isolator due to noise.

    Regards,
    Aaditya Vittal