Hi team,
Does "2 mm maximum from VCC1" shown in "Layout Example" mean that 0.1uF must be within 2mm away from VCC1 pin?
I guess that the closer to VCC1 0.1uF capacitor is, the better layout or noise performance is.
I found that "2 mm maximum from VCC2" in figure 9-2 and figure 11-1.
I just confirm my understanding is correct.
Regards,
Ochi