https://e2e.ti.com/support/isolation-group/isolation/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1695171/iso1540-iso1540-different-behavior-when-flip/6536009Wed, 11 Nov 2026 07:54:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:1a779fcc-44ae-40f4-8ca3-39b1da020e05Aaditya V.Hi, Thanks for the additional information! The ISO1540 has asymmetric I/O stages on Side 1 and Side 2. Specifically, Side 1 has an intentionally offset low-level output voltage (VOL1), which can be 0.57V to 0.8V. This offset is necessary for the device&#39;s bidirectional communication scheme and prevents internal logic latching. Side 2, on the other hand, has a maximum VOL of 0.4V. Since the INA237 specifies a maximum input-low voltage (VIL) of 0.4 V, we recommend connecting the MCU (I2C controller) to Side 1 and the INA237 to Side 2. This ensures that the INA237 sees a low-level voltage within its specified input requirements. Also, please note that Side 1 refers to the VCC1 side of the device, while Side 2 refers to the VCC2 side. Regards, Aadityahttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1696553/isow1432-alternate-part-number/6535568Tue, 10 Nov 2026 22:43:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5ad6ab02-239c-4796-a37e-ff0c7be4a556Justin LewisHi Venkata, Thank you for reaching out. We do not have an exact timeline for stock replenishment at this time due to high demand for this device. We recommend subscribing to part notifications on TI.com; this is the best way to be notified immediately via email as soon as the part is back in stock. As for an alternative, the ISOW1412 is a pin-to-pin compatible IC. However, please note that the two devices provide different specifications, so we recommend reviewing the respective datasheets to ensure the ISOW1412 meets your specific application requirements. Best regards, Justinhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1696516/iso1050-iso1050dubr-sop-min-height/6535558Tue, 10 Nov 2026 22:22:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:fd99a242-8e09-4e5a-bdd1-0373e641a963Justin LewisHi Yu-Chen, No minimum overall package height is specified for the DUB0008A (8-pin SOP) outline. The mechanical drawing (TI doc 4222355/G, 04/2019) dimensions the seating-plane-to-top-of-body height as 4.85 mm MAX only — the &quot;A&quot; dimension is a maximum-only control, which is standard TI practice for this outline. The only minimum height-type value on the drawing is the lead standoff (A1) = 0.38 mm MIN, measured from the seating plane to the lead foot. This is a distinct dimension and is not a substitute for a minimum overall height. Please let me know if you have any questions. Best regards, Justinhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1696691/sn6505a-technical-support-required-sn6505a-clk-pin-configuration-and-isolated-power-supplyTue, 10 Nov 2026 13:38:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:139e11b7-4b65-43b0-8a04-c9e420eedfd8Jayakeerthana PPart Number: SN6505A Other Parts Discussed in Thread: ISO1044 , ISOW1432 , ISO1432 , ISOW1044 , Hi Team, We are currently in the redesign phase as the ISOW1432 and ISOW1044 are out of stock. We are planning to use the ISO1432 and ISO1044 along with the SN6505A to generate the required isolated 5 V supply. We need your support with the following clarifications: Can the CLK pin of SN6505A be left unconnected or connected directly to GND to use the internal oscillator? If an external clock is required, how should it be generated and connected? Please suggest a suitable transformer and secondary-side rectifier circuit to generate an isolated 5 V output. Can the SN6505A support the combined power requirements of two ISO1432 and one ISO1044? Please recommend a suitable reference circuit and component values for this implementation. Since we are currently in the redesign phase, we request your support and recommendations at the earliest to avoid delays in the design activities.ISO1432Chassis control &amp; safetyISOW1044ISO1044SN6505Aisow1432https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1695171/iso1540-iso1540-different-behavior-when-flip/6534903Tue, 10 Nov 2026 10:16:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4fcdc5ce-6f32-458b-808f-f1be32faaa39Jack LiangHi Eric, After check datasheet, ISO1540 SDA and SCL are bidirectional, ISO1541 SDA is bidirectional and SCL is unidirectional. We use MCU through I2C I/F to get INA237 data with ISO1540.INA237 VIL is 0.4Vmax. Does MCU through ISO1540 0.6V offset is ok for INA237? For our design, we should connect MCU (controller) to ISO1540 side 1(pin 1~4) and INA237 (device) to ISO1540 side 2 (pin 5~8).https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1696553/isow1432-alternate-part-numberTue, 10 Nov 2026 06:42:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:bffdef38-bff5-44f8-be6b-4d183eee1339Venkata Rami Reddy VempatiPart Number: ISOW1432 Other Parts Discussed in Thread: ISOW1412 Hi Team, Regarding ISOW1432DFMR , could you please let us know the expected replenishment date or when stock is anticipated to become available? Also, could you please suggest any pin-to-pin compatible alternate ICs for this part? Thank you.ISOW141248V in automotiveisow1432https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1696516/iso1050-iso1050dubr-sop-min-heightTue, 10 Nov 2026 03:25:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4bf791b0-c21c-4ff3-ae16-0f09557c0f74Yu-ChenPart Number: ISO1050 Team, Since ISO1050DUBR datasheet only provides SOP MAX height 4.85mm. Customer wants to know the MIN height, can you help to check? Thanks.ISO1050https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1696418/isow3080-isow308x-when-will-production-parts-be-available/6534392Mon, 09 Nov 2026 22:51:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:40e94ff7-21c3-4708-b88a-3e9bef4153d7Justin LewisHi Maxime, While I cannot provide a specific date, our parts generally RTM a couple months after the product is displayed on ti.com. Best regards, Justinhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1696076/iso1228-iso1228-input-config/6534377Mon, 09 Nov 2026 22:32:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e96c7143-2859-487a-9722-4f43757cb1f6Justin LewisHi Anicia, For sourcing mode, the LEDx pins must be connected to AVCC rather than AVSS. The ISO1228 uses an internal comparator on these pins to detect the input mode; tying them to AVSS (GND) makes the device think it is in sink mode, which is why your outputs are stuck LOW. [quote userid=&quot;703636&quot; url=&quot;~/support/isolation-group/isolation/f/isolation-forum/1696076/iso1228-iso1228-input-config&quot;]Section 7.3.2 says that the LEDx pins can be connected directly to GND in sink or source mode.[/quote] While Section 7.3.2 provides general simplification, Section 8.2.2 is the correct reference for your application: in sourcing mode, the LEDx pins must be held above the 3V threshold via AVCC. To fix this, re-route all 8 LEDx pins to AVCC through a current-limiting resistor (even if you aren&#39;t using an LED for indication). Additionally, ensure your RILIM and CFIL components follow the sourcing topology and match the values specified in Table 1-2 for source mode. Best regards, Justinhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1694092/iso7740-iso7740-isow7741-for-4kv-isolation-com-port-applicatiion/6534368Mon, 09 Nov 2026 22:25:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:cc41f07e-9854-4fac-bb22-4b40b3973b45Aaditya V.Hi Gareth, [quote userid=&quot;446400&quot; url=&quot;~/support/isolation-group/isolation/f/isolation-forum/1694092/iso7740-iso7740-isow7741-for-4kv-isolation-com-port-applicatiion/6528405&quot;]For the 4kV Hi-Pot requirement, can we continue using ISO7740FDWR + ISOW7741DFMR, with modifications to the PCB layout and Y-cap configuration?[/quote] Yes, you can continue using these devices. As I mentioned in my previous post, the y-cap is mainly dependent on your application. Based on your evaluation and testing of your application and emissions requirements, the y-cap may be helpful. [quote userid=&quot;446400&quot; url=&quot;~/support/isolation-group/isolation/f/isolation-forum/1694092/iso7740-iso7740-isow7741-for-4kv-isolation-com-port-applicatiion/6528405&quot;] Can ISO7740 + ISOW7741 also meet the 2MOPP requirement? [/quote] I would also like to restate that the Hi-Pot test (VISO) is unrelated to the MOPP requirements for IEC 60601-1. Both devices meet the 2MOPP requirement. This can be seen on the CSA certificate, since 2MOPP IEC 60601-1 is tested for these devices. Regards, Aadityahttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1696418/isow3080-isow308x-when-will-production-parts-be-availableMon, 09 Nov 2026 16:29:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:3312ae8e-f79e-408b-aa7c-75b1c4079fe8Maxime AugustinPart Number: ISOW3080 Other Parts Discussed in Thread: ISOW3086 , I would like to know when the ISOW3080 and ISOW3086 will enter production. Thank you.ISOW3086ISOW3080https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1696076/iso1228-iso1228-input-configFri, 06 Nov 2026 23:10:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e03ef464-f1f4-4098-bb04-b815a22fad7cAnicia YuPart Number: ISO1228 Hi, I am using the ISO1228 in sourcing mode. During testing I noticed that the device is not detecting the changes in the external switch states. The outputs remain LOW regardless of whether the switches are open or closed. I double cheked my schematic against Section 8.2.2 of the datasheet and noticed that all LEDx pins are connected to AVSS (GND) instead of AVCC. I am not using external LEDs. Only have RPAR and CIN connected to each LEDx. Section 7.3.2 says that the LEDx pins can be connected directly to GND in sink or source mode. Section 8.2.2 says that the LEDs are connected to the module field power instead of AVSS. For a sourcing mode configuration without external LEDs, should the LEDx pins be connected to AVCC or AVSS?ISO1228Test &amp; Measurementhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1693673/iso7231m-customer-wants-to-know-the-mtbf-fit-value-of-iso7231mdwr/6533137Fri, 06 Nov 2026 20:54:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b204be4f-3293-4351-8cfc-41a4c49744b1Aaditya V.Hi Bruce, Thanks for your patience and sorry for the delay. Please use the MTBF and FIT for ISO7230MDWR, which is very similar to the ISO7231MDWR. These values can be used interchangeably. I am checking with my team to have the MTBF values show up for the ISO7231MDWR Regards, Aadityahttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1689006/iso6763-desiging-with-iso6763dwr/6533121Fri, 06 Nov 2026 20:24:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:28ead554-1f98-44a3-9aa9-a1a1a9030ac3Aaditya V.Hello, Both devices have the same foot print as they both are the DW package. [quote userid=&quot;593979&quot; url=&quot;~/support/isolation-group/isolation/f/isolation-forum/1689006/iso6763-desiging-with-iso6763dwr/6532510&quot;] For the device ISO6163DWR, there is an option to put the outputs in high impedance mode when the IND (chip select to slave 2) is high. Can you please confirm this will put all the outputs (including OUTA - OUTC and OUE, OUTF) to high impedance state?. [/quote] This feature is the STANDBY mode for the device. This state is active when INC and IND meet the STANDBY requirements highlighted in the datasheet. When the device is in STANDBY mode, the outputs are in High-Z, as shown in the datasheet. The datasheet also reviews how STANDBY mode works. It depends on the active time of INC and IND which then sends a standby request. once the time requirement has been met, the device will go into standby mode. Regards, Aadityahttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1695614/isow1044-pcb-layout-specs/6532926Fri, 06 Nov 2026 16:47:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:2a2ac96e-26a4-4fdb-9705-9610cb72726amarco gestriHi Varun, thanks for the clear words. Now I understand the heating. Thank You and best regards.https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1695614/isow1044-pcb-layout-specs/6532847Fri, 06 Nov 2026 15:50:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:2eac5df4-df45-4500-b4e8-d136827c1ddeVarun KumarHi Marco, Thanks for reaching out. In short - Yes, two ISOW1044 can be placed on top and bottom of the PCB, back-to-back without any issue. Also, the spacing between 2 adjacent device looks good in your PCB layout - there are no specific requirement for spacing between the 2 ISOW devices. You can possibly put traces and planes running below the device as it does not affect thermals in any way. However, it will violate the Creepage/Clearance of the Isolation barrier on the PCB - If this is not of your concern then you can keep the design as is. We can comment better on your concerns if you can share more details on what makes you think there&#39;s an &quot;anomalous heating&quot;! Please understand that with an integrated DC-DC of 47% efficiency, the device can dissipate up to 0.5W inside each device which in turn can heat the device -&gt; This heating of device is an expected behavior and can possibly be what you report as anomalous heating. Regards Varunhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1692238/sn6501-startup-oscillation-hiccup-issue-with-sn6501-sn6505b-powering-tps76333-ldo/6532667Fri, 06 Nov 2026 11:34:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b61876ff-0aa3-40bf-8a94-1ad6a9369720İsmet ŞenThis helped a lot. Thank you Niranjana.https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1689006/iso6763-desiging-with-iso6763dwr/6532510Fri, 06 Nov 2026 08:47:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ec7bf0f2-c80e-4fa4-a9a3-35e8e833ddf5SvHello Team, Thank you for your reply. For the device ISO6163DWR, there is an option to put the outputs in high impedance mode when the IND (chip select to slave 2) is high. Can you please confirm this will put all the outputs (including OUTA - OUTC and OUE, OUTF) to high impedance state?. We hope since IND is high the corresponding output will also beat high. Also, both the device has same footprint.https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1695614/isow1044-pcb-layout-specs/6532069Thu, 05 Nov 2026 22:05:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ba6b1076-e07c-40a6-adf7-a85efe25025fJustin LewisHi Marco, Thank you for bringing this to e2e. Please allow us some time to review your question so that we can provide relevant feedback. Best regards, Justinhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1692238/sn6501-startup-oscillation-hiccup-issue-with-sn6501-sn6505b-powering-tps76333-ldo/6531417Thu, 05 Nov 2026 11:02:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:eea256ca-e5ce-4ec4-a2aa-14170207b135Niranjana A MHi Ismet, Setting the LDO input capacitor to a higher value(~47uF) should help eliminate the hiccup on the output waveform. You can opt for an LDO with soft-start feature like the TLV755P to prevent this issue. I have attached the SIMPLIS waveforms with both LDOs, using an input capacitance of 47uF. Please reach out to the Linear Regulators team if you have any further queries regarding the LDO. Regards, Niranjana.