https://e2e.ti.com/support/isolation-group/isolation/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667548/tl2845b-high-voltage-genration/6431899Tue, 28 Jul 2026 19:24:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:04276199-8983-4d50-95d4-071bb8dda53cJohn GomezA couple of questions: Can you provide a reference design / schematic that you are basing your design on? Can you provide waveforms of the output voltage, VFB pin, COMP pin? Thanks, Johnhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667931/am62a7-q1-am62a-hardware-firewall-configuration-via-k3-sysconfig-failing/6431727Tue, 28 Jul 2026 16:59:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5c1ba583-e80a-4cd3-a4df-a287327b0782Mohamed HafezAdding to my previous question. I have another questions regarding configuring firewall protection for the SDRAM According to the AM62Ax TRM (SPRUJ16B), Table 3-8 (Region Based Firewalls), the DDR32SS0 target on the CBASS0 interconnect is protected by two firewalls : Firewall ID 0: 8 Firewall Regions Firewall ID 1: 16 Firewall Regions So, I need to confirm what of the below is the correct understanding If I configured the SDRAM using firewall 0, I can only configure 8 Specific custom regions (and cannot used firewall id 1) If I configured the SDRAM using firewall 1, I can only configure 16 Specific custom regions (and cannot used firewall id 0) I can configure the SDRAM using firewall 0 combined with firewall id1, so configure 24 Specific custom regions. Our Conflict: If our current memory layout strictly require isolating more than 16 distinct sub-regions in the SDRAM to properly secure various DMA channels, MCU domains (like the R5FSS), and the A53/C7x cores Also, the &quot;.region&quot; attribute in the struct tisci_msg_fwl_set_firewall_region_req shown below, does it represent only the index for the subregions? or it represents the index of the whole firewall configurations? For example, after configuring the firewall for I2C0 instance with .region = 0, shall I configure the SDRAM instance starting with .region = 0 too, or shall I increment the index and start with .region = 1? ``` struct tisci_msg_fwl_set_firewall_region_req am62a_fwl_data [] = { /* modules_firewallConfig1 - 1 firewalls with 1 regions each */ { . fwl_id = 8 , . region = 0 , . n_permission_regs = 3 , . control = 0x20A , . start_address = 0x000020000000 , . end_address = 0x0000200000FF , . permissions = { 0xD4FFFF , 0xD4FFFF , 0xD4FFFF }, }, }; ``` Thanks, M. Hafezhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667698/isow1044-power-supply-decoupling/6431675Tue, 28 Jul 2026 16:24:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:17189baf-48df-4b5d-8193-44d03a5ac0beVarun KumarHi Andreas, We don&#39;t have any available schematics for SMPS. Generally, we do not recommend using SMPS to ISOW VDD as both of them are inherently noisy which is why EVM also has a LDO instead of SMPS. Also, it is recommended to have a LDO between common VDD supply from buck converter and ADC supply to prevent precision issue with ADC. Regards Varunhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1668294/iso6763-transistor-and-gate-countTue, 28 Jul 2026 13:59:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4905f556-4a12-4cc1-bf56-7d05cd5259fcColin WiesePart Number: ISO6763 Hello, I am contacting you to ask about the transistor and gate count on ISO6763FQDWRQ1. We need this for the SR-332 standard, so an approximate count will work for us. ThanksISO6763https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667114/iso7760-fsi-through-isolator-signal-integrity/6431235Tue, 28 Jul 2026 11:49:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:31685ed9-d24d-4b78-a31f-d96aa373f7cfSebastian GlasHi Aaditya, Thanks a lot for the detailed follow-up. I&#39;m not able to share the full schematic or PCB layout due to company confidentiality, but I&#39;ve described the relevant details below and included the oscilloscope captures. 1. Clock / data rate: Correct. The forwarded clock through the isolator runs at 50 MHz, which is 100 Mbps equivalent on the clock channel, right at the ISO77xx family maximum. The two data lines (TXD0/TXD1) run lower, ~50 Mbps each (100 Mbps aggregate across the pair). Thanks for the note on headroom, we will try the ISO6463, though we believe the root cause is signal integrity from the long traces and multi-node topology rather than the isolator running at its data-rate ceiling. 2. Series resistors: Currently the three FSI lines are driven directly from the isolator outputs onto the bus, with no series resistors on the signal lines. We evaluated adding series resistors, but in a multi-node configuration they only clean up the far end of the line and do not fix the near node (A). 3. Waveforms: captures of the signal at nodes A and C. Node A (nearest the isolator) shows a reflection arriving ~2.2 ns after the edge, consistent with a reflection off the unterminated far end. I don&#39;t have a measurement at node B, but node C (the far end) is clean, confirming the problem does not occur at the end of the line. 4. Topology / routing: The three DSPs are inline on a single daisy-chained bus at 70 / 122 / 170 mm from the isolator output, with the far end (node C) unterminated. There are no long stubs, the signal runs on an internal layer and a single via connects to each DSP pad. (Edit: the isolator is just a couple mm after the connector shown in the picture). As a test, I added a parallel termination (~50 ohm) at the far end. It resolves the reflection, but it loads the isolator output and drops the logic-high level to ~2 V, which is too low for reliable operation. In other words, the isolator&#39;s output impedance is too high to drive a terminated line. Given that, our question is now more specific: could you recommend a driver/buffer to place at the isolator output that can drive a properly terminated (~50 ohm) transmission line to full logic level, with low additive jitter suitable for the 50 MHz FSI clock? A fast CMOS buffer with low output impedance, or point-to-point fan-out with per-node termination, are the options we&#39;re considering, and any specific part recommendation would be very helpful. Thanks again, Sebastian Signal at node A with termination resistor of 50 ohm:https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667698/isow1044-power-supply-decoupling/6431166Tue, 28 Jul 2026 10:56:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c5a33b92-455b-4287-9254-1d2dd549d43cAndreas NestlerHello Varun, Thanks for your response and the technical details regarding switching frequency and ripple. Are there application schematics available with switched mode power supply driving the +5V? In the EVM the classic linear regulator of type LM317 is used with 47uF output capacitance. Since we provide the +5V also to ADC converters we would like to get a ripple target of &lt;50mVpp maximum. Thanks in advance! Best regards, Andreashttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667931/am62a7-q1-am62a-hardware-firewall-configuration-via-k3-sysconfig-failing/6431084Tue, 28 Jul 2026 09:42:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:8fcad450-e87a-4494-b385-129678a9044aMohamed HafezHello Prashant Shivhare , Thank you for the clarification regarding the K3 Resource Partitioning SysConfig tool. It is helpful to know that static firewall board configuration via this tool is currently unsupported and that we should focus on runtime application C code instead. As we shift our focus to the runtime implementation, we are facing significant challenges due to missing documentation. Specifically, a comprehensive &quot;Firewall Configuration and Debugging User Guide&quot; seems to be missing from the AM62Ax Sitara Processors Technical Reference Manual (SPRUJ16B) . To proceed with our driver development, we need your guidance on how to effectively debug firewall protections. could you please answer the following questions? 1. Debugging Firewall Exceptions When a core (e.g., the R5 MCU) crashes with a &quot;DATA abort exception,&quot; how can we definitively identify that this abort was triggered by a firewall protection violation rather than a standard memory or bus fault? Are there specific fault status registers we should be reading? 2. Enabling and Accessing Firewall Logs How do we properly enable the interconnect debugging features to ensure blocked transactions are successfully logged ? 3. Firewall Log Parser Once the logs are captured, how do we extract and interpret them? Is there a specific TI firewall log parser script or tool available in the SDK to decode this data? Thanks,https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667114/iso7760-fsi-through-isolator-signal-integrity/6430794Tue, 28 Jul 2026 05:53:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:8fabc94f-a8fc-4b23-a825-d0b85bec5584Aaditya V.Hi Sebastian, Thanks for reaching out and for your patience. From my understanding, it seems there are several nodes in which the isolator is driving a signal that reaches three different DSPs, each located at these nodes. The primary issue being observed is abnormal signal for the first DSP at node A. Considering this, I do have some follow-up questions to better understand your system and the issue: The clock frequency through the isolator is 50MHz, is this correct? This would be 100mbps The maximum supported data rate of the ISO77xx family of isolators is 100Mbps. Newer generation of digital isolators such as the ISO6463 support 150Mbps, adding a bit more headroom in terms of supported data rate. Can you please provide a schematic of the isolator, the different nodes, and DSPs? I would like to check for series resistors on the signal lines of the isolator which may affect the signal accuracy of the system, especially over longer traces. Can you please share waveform images from an oscilloscope of the following? waveforms of input and output directly on the isolator waveforms at each node Can you please share images of the PCB layout to better understand the trace layout and device layout? longer traces, as by provided measurements, may cause larger impedance on the lines and also depending on the routing, larger reflections on the lines that can also cause signal integrity issues. Regards, Aadityahttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667698/isow1044-power-supply-decoupling/6430776Tue, 28 Jul 2026 05:26:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:ebc016b0-9d0e-4583-afe2-b7d7c0c4ed06Varun KumarHi Andreas, Thanks for reaching out providing detailed inputs. VDD ripple from each ISOW is expected to be around 25mV-30mV and having 4 of them tied to same supply giving 80-100mV is expected from ISOW device. Now, you can reduce the ripple by increasing bulk capacitance at both out of buck converter as well as input of ISOW - Increase 10uF at each site to 47uF and we expect it to reduce the ripple. Yes, internal switching frequency integrated DC/DC is around 25MHz but the ripple that you measure at the common VDD supply will not have this frequency component as it gets filtered out by the local capacitors. If you measure the ripple frequency it should be in the range of 100s of kHz which corresponds to the regulation of the power supply. Regards Varunhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667931/am62a7-q1-am62a-hardware-firewall-configuration-via-k3-sysconfig-failing/6430769Tue, 28 Jul 2026 05:23:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:fbaa98ac-e5e1-4338-9291-837cc4be3fc5Prashant ShivhareHello, [quote userid=&quot;591516&quot; url=&quot;~/support/isolation-group/isolation/f/isolation-forum/1667931/am62a7-q1-am62a-hardware-firewall-configuration-via-k3-sysconfig-failing&quot;]Experiment 2: Configuration via K3 Resource Partitioning SysCfg (Failed)[/quote] The firewall module integrated into this tool is not tested and supported. In any case, the intention of this module, whenever supported, would be to auto-generate the C code to be integrated into the application itself rather than the board configurations. The board configurations don&#39;t have any fields for firewall configurations.https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667931/am62a7-q1-am62a-hardware-firewall-configuration-via-k3-sysconfig-failingMon, 27 Jul 2026 17:12:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:0441ffd2-0955-4e65-9904-af023f514490Mohamed HafezPart Number: AM62A7-Q1 Other Parts Discussed in Thread: SYSCONFIG Hello TI Support Team, I am working on SOC driver development for the Sitara AM62A, specifically focusing on isolating peripherals using the hardware firewalls. I am encountering an issue where firewall configurations applied via the K3 Resource Partitioning SysConfig tool are not taking effect, whereas runtime configurations via Sciclient work perfectly. Experiment 1: Runtime Software Configuration from SBL (Successful) I successfully applied firewall protection for the I2C0 instance at runtime from the SBL. I restricted access to the R5_Wkup core only. Positive Scenario: Attempted access from the R5_Wkup core passed without issues. Negative Scenario: Attempted access from the RF MCU crashed with a &quot;DATA abort exception&quot;. This confirms the hardware firewall operates correctly when programmed dynamically. Experiment 2: Configuration via K3 Resource Partitioning SysCfg (Failed) I attempted to move this protection into the static Board Configuration using SysConfig. The protection failed, and any core can still access the I2C0 instance. Here are the exact steps I followed: Edited Firewall.json to add the I2C0 instance: JSON { &quot;end_address&quot;: &quot;0x0000200000FF&quot;, &quot;ids&quot;: [ 8 ], &quot;memory&quot;: false, &quot;name&quot;: &quot;I2C0&quot;, &quot;num_regions&quot;: 16, &quot;protected_inst&quot;: [ &quot;I2C_0&quot; ], &quot;start_address&quot;: &quot;0x000020000000&quot; } Configured the Background (BG) instance via SysConfig. Configured the Foreground (FG) instance for I2C0 to be accessible only from the R5_wkup core. Generated the SysConfig using: make configure-gen SOC=am62ax Generated the board configuration blobs using: make sciclient_boardcfg SOC=am62ax (yielding boardcfg_sbldata_blob.bin and boardcfg_blob.bin ). Compiled the SBL, flashed the binaries, and ran the tests. Both positive and negative scenarios failed (no protection was applied; all cores have access). My Questions: What is causing the SysConfig-generated board configuration to fail to apply the firewall rules, unlike the runtime Sciclient API approach? Are there any incorrect steps in my Firewall.json definition or the build sequence provided above? Thank you for your guidance. Best regards, M. HafezAdvanced Driver Assistance Systems (ADAS)AM62A7-Q1SYSCONFIGhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667452/isow1432-schematic-review/6429668Mon, 27 Jul 2026 11:23:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:eddb02b3-4332-45ef-a427-35062767e0fcVarun KumarHi Luis, Thanks for reaching out. Yes, the A/B shorted to Y/Z respectively is the correct connection for converting achieving half-duplex to full-duplex. Regards Varunhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667698/isow1044-power-supply-decouplingMon, 27 Jul 2026 07:48:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:cf96d064-ac3c-4027-b888-45e2668e42e4Andreas NestlerPart Number: ISOW1044 Other Parts Discussed in Thread: LM317 Hello, we are using 4x ISOW1044 in our design. We are facing noise issues on our +5V supply (80 to 100mVpp). Since the +5V supply rail is also used for other noise sensitive application we would like to minimize the noise. The ISOW application circuitry follows the recommendatations according datasheet so we have the ferrit beads and the capacitance on VDD pin: Our +5V regulator is a buck converter with total 4x10uF output capacitance and a small ferrit bead at the output. I guess that the noise we observe are not from our 5V converter since the ripple signature is more or less random. Q1 : what are the recommendations for the driving supply? Do we have to add bulk capacitance and how much? Q2 : What is the frequency of chip internal isolated DCDC converter? Datasheet states in Feature section:: To be honest 25MHz seems to be a quiet high switching frequency. Q3 : Can you confirm the 25MHz switching frequency of internal DCDC converter? Thanks in advance! Best regards, AndreasLM317ISOW1044Aerospace &amp; Defensehttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667548/tl2845b-high-voltage-genrationSat, 25 Jul 2026 16:18:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c2bcbd58-f196-49cf-b2d5-e6a8bb50478cPritam MalusarePart Number: TL2845B Other Parts Discussed in Thread: TL2845 Hi everyone, I&#39;m designing high voltage genration circuit for 50V to 5000V dc using TL2845. but I&#39;m not able to archive voltage below 1300V. I&#39;ve tried changing feedback resistor ladder path, COMP-Vfb pin resistors but not working. could anyone help with this.TL2845TL2845BTest &amp; Measurementhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667480/isom8111-din-en-13849-2/6428879Fri, 24 Jul 2026 21:47:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:7d4aada9-8673-46b6-bc94-696825ab1303Koteshwar RaoHi Hanno, Thanks for reaching out. Yes, this exclusion applies to ISOM8111 as well, as the device meets overvoltage category III according to IEC 60664-1. Please see below screenshot from Insulation Specifications section of ISOM8111 datasheet that specifies the overvoltage category rating of the device. Thanks. Regards, Koteshwar Raohttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667480/isom8111-din-en-13849-2Fri, 24 Jul 2026 17:38:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b22f5be8-0c10-4753-9765-22ea0eb19929Hanno ReimerPart Number: ISOM8111 I have the following question about the Texas Instruments ISOM8111 opto-emulator: In DIN EN 13849-2 Table D.19, a fault exclusion for optocouplers is for a short circuit between input and output, If the optocoupler is built according to IEC 60664-1 overvoltage category III. 1. Is the opto-emulator ISOM8111 built according to overvoltage category III? 2. Does this error exclusion also apply to ISOM8111? 3. Is there a confirmation / certificate for this?Industrial AutomationISOM8111https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1667452/isow1432-schematic-reviewFri, 24 Jul 2026 15:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b123148f-605b-44d9-bcb1-ee495b9251b3Jo&#227;o AntunesPart Number: ISOW1432 Can you review this schematic an give me some feedback? Plesae advise if the connections on the A/B/X/Y pins are correct. I saw this in the forum and no one poited out tht those connections were wrong: https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1627494/isow1412-review-schematic Best LuisEnergy infrastructureisow1432https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1666871/tps25981-schematic-verification-of-tps259813arpwr/6428416Fri, 24 Jul 2026 15:07:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:038d6f2f-59af-4a08-9755-47cf55293741Mani RayHello Irfan, SMBJ13A maximum clamping voltage is 21.5V but device abs max rating of input pin 20V. So, I would recommend to use SMBJ12A. Schematic and design calculator look good. Best Regards, Mani.https://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1666871/tps25981-schematic-verification-of-tps259813arpwr/6427945Fri, 24 Jul 2026 07:18:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5dbefddb-1979-4779-bbfa-831d3f0b5e00Irfan ShaikhHi Mani, Thank you for the suggestion, could you please check that the below diodes can be used as we don&#39;t have the library you have shared. TVS: SMBJ13A Schottky: SS34FA. The Diode at the input should be placed near to the Power pin as shown in below image? Also, I have attached the excel with values and also the updated schematics screen shot. Kindly check and let me know if anything needs to be changed e2e.ti.com/.../TPS25981_5F00_Design_5F00_Calculator.xlsx Regards, Irfanhttps://e2e.ti.com/support/isolation-group/isolation/f/isolation-forum/1666871/tps25981-schematic-verification-of-tps259813arpwr/6427932Fri, 24 Jul 2026 07:05:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:9fb3bff4-f6aa-40bb-a2ea-1014ce987995Mani RayHello Irfan, You can us same calculator. TVS: SMBJ12A Schottky: B330AF-13 Best Regards, Mani.