ISO7741: When ISO7741, isolation failure, what is the state of IO?

Hi Ming,

Apologies for the delay in coming back to you on your question.
Thanks for going through the white paper titled "Understanding Failure Modes in Isolators". As you understood already, there are two failure modes that are being discussed in the article.

Failure Mode 1:
As explained and described in Figure 3 of the referred article, please note that most electronic device when exposed to stress levels more than what they are capable of then they get damaged catastrophically. When there is such damage on electronic components, the damage could lead to a complete failure or a partial failure and it can never be determined if the failure will result into a complete short or with some resistance. Since there is a chance that it can fail short at least once in few tens or hundreds of samples, it safe to assume that most electronic components fail short when exposed to excessive stress levels.
e.g., consider applying higher voltage to VCC pin of any digital isolator (TI or competition) and apply higher voltage than the maximum voltage the device can withstand, let's say 10V. When you test the device for this, some devices can fail completely short and some might fail with some impedance.
Since TI's reinforced digital isolators have one of industries highest isolation ratings, it is very unlikely for TI device to get damaged than other lower isolation rated devices.

Failure Mode 2:
As described in Figure 5 of the article, TI's reinforced digital isolators have two two series caps (hence two barriers). When there is a damage on one die, the isolation cap on the other die stays intact maintaining isolation across the barrier. Please note that this is not the case with single isolation barrier devices. A damage on one die could lead to damage of the single isolation barrier.

I hope that answers your question, let me know if something is not clear to you. Thank you.


Regards,
Koteshwar Rao